Microchip Technology MA180025 Data Sheet
PIC18F87J90 FAMILY
DS39933D-page 178
2010 Microchip Technology Inc.
TABLE 16-3:
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
RCON
IPEN
—
CM
RI
TO
PD
POR
BOR
PIR3
—
LCDIF
RC2IF
TX2IF
CTMUIF
CCP2IF
CCP1IF
RTCCIF
62
PIE3
—
LCDIE
RC2IE
TX2IE
CTMUIE
CCP2IE
CCP1IE
RTCCIE
IPR3
—
LCDIP
RC2IP
TX2IP
CTMUIP
CCP2IP
CCP1IP
RTCCIP
PIR2
OSCFIF
CMIF
—
—
BCLIF
LVDIF
TMR3IF
—
PIE2
OSCFIE
CMIE
—
—
BCLIE
LVDIE
TMR3IE
—
IPR2
OSCFIP
CMIP
—
—
BCLIP
LVDIP
TMR3IP
—
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
TRISE
TRISE7
TRISE6
TRISE5
TRISE4
TRISE3
—
TRISE1
TRISE0
TRISG
SPIOD
CCP2OD CCP1OD
TRISG4
TRISG3
TRISG2
TRISG1
TRISG0
TMR1L
Timer1 Register Low Byte
TMR1H
Timer1 Register High Byte
T1CON
RD16
T1RUN
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
TMR3H
Timer3 Register High Byte
TMR3L
Timer3 Register Low Byte
T3CON
RD16
T3CCP2 T3CKPS1 T3CKPS0 T3CCP1
T3SYNC TMR3CS TMR3ON
CCPR1L
Capture/Compare/PWM Register 1 Low Byte
CCPR1H
Capture/Compare/PWM Register 1 High Byte
CCP1CON
—
—
DC1B1
DC1B0
CCP1M3 CCP1M2 CCP1M1 CCP1M0
CCPR2L
Capture/Compare/PWM Register 2 Low Byte
CCPR2H
Capture/Compare/PWM Register 2 High Byte
CCP2CON
—
—
DC2B1
DC2B0
CCP2M3 CCP2M2 CCP2M1 CCP2M0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare, Timer1 or Timer3.