Microchip Technology MA180025 Data Sheet
PIC18F87J90 FAMILY
DS39933D-page 254
2010 Microchip Technology Inc.
TABLE 18-4:
REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
PIR1
—
ADIF
RC1IF
TX1IF
SSPIF
—
TMR2IF
TMR1IF
PIE1
—
ADIE
RC1IE
TX1IE
SSPIE
—
TMR2IE
TMR1IE
IPR1
—
ADIP
RC1IP
TX1IP
SSPIP
—
TMR2IP
TMR1IP
PIR2
OSCFIF
CMIF
—
—
BCLIF
LVDIF
TMR3IF
—
PIE2
OSCFIE
CMIE
—
—
BCLIE
LVDIE
TMR3IE
—
IPR2
OSCFIP
CMIP
—
—
BCLIP
LVDIP
TMR3IP
—
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
SSPBUF
MSSP Receive Buffer/Transmit Register
SSPADD
MSSP Address Register (I
2
C™ Slave mode),
MSSP Baud Rate Reload Register (I
2
C Master mode)
SSPCON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
SSPCON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
GCEN
ACKSTAT ADMSK5
(1)
ADMSK4
(1)
ADMSK3
(1)
ADMSK2
(1)
ADMSK1
(1)
SEN
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.
Note 1: Alternate bit definitions for use in I
2
C Slave mode operations only.