Microchip Technology MA180025 Data Sheet
PIC18F87J90 FAMILY
DS39933D-page 92
2010 Microchip Technology Inc.
7.2.2
TABLE LATCH REGISTER (TABLAT)
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch register is used to
hold 8-bit data during data transfers between program
memory and data RAM.
into the SFR space. The Table Latch register is used to
hold 8-bit data during data transfers between program
memory and data RAM.
7.2.3
TABLE POINTER REGISTER
(TBLPTR)
(TBLPTR)
The Table Pointer (TBLPTR) register addresses a byte
within the program memory. The TBLPTR is comprised
of three SFR registers: Table Pointer Upper Byte, Table
Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). These three regis-
ters join to form a 22-bit wide pointer. The low-order
21 bits allow the device to address up to 2 Mbytes of
program memory space. The 22nd bit allows access to
the Device ID, the user ID and the Configuration bits.
The Table Pointer register, TBLPTR, is used by the
TBLRD
within the program memory. The TBLPTR is comprised
of three SFR registers: Table Pointer Upper Byte, Table
Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). These three regis-
ters join to form a 22-bit wide pointer. The low-order
21 bits allow the device to address up to 2 Mbytes of
program memory space. The 22nd bit allows access to
the Device ID, the user ID and the Configuration bits.
The Table Pointer register, TBLPTR, is used by the
TBLRD
and TBLWT instructions. These instructions can
update the TBLPTR in one of four ways based on the
table operation. These operations are shown in
Table 7-1. These operations on the TBLPTR only affect
the low-order 21 bits.
table operation. These operations are shown in
Table 7-1. These operations on the TBLPTR only affect
the low-order 21 bits.
7.2.4
TABLE POINTER BOUNDARIES
TBLPTR is used in reads, writes and erases of the
Flash program memory.
When a TBLRD is executed, all 22 bits of the TBLPTR
determine which byte is read from program memory
into TABLAT.
When a TBLWT is executed, the seven LSbs of the
Table Pointer register (TBLPTR<6:0>) determine which
of the 64 program memory holding registers is written
to. When the timed write to program memory begins
(via the WR bit), the 12 MSbs of the TBLPTR
(TBLPTR<21:10>) determine which program memory
block of 1024 bytes is written to. For more detail, see
Section 7.5 “Writing to Flash Program Memory”.
When an erase of program memory is executed, the
12 MSbs of the Table Pointer register point to the
1024-byte block that will be erased. The Least
Significant bits are ignored.
Figure 7-3 describes the relevant boundaries of
TBLPTR based on Flash program memory operations.
Flash program memory.
When a TBLRD is executed, all 22 bits of the TBLPTR
determine which byte is read from program memory
into TABLAT.
When a TBLWT is executed, the seven LSbs of the
Table Pointer register (TBLPTR<6:0>) determine which
of the 64 program memory holding registers is written
to. When the timed write to program memory begins
(via the WR bit), the 12 MSbs of the TBLPTR
(TBLPTR<21:10>) determine which program memory
block of 1024 bytes is written to. For more detail, see
Section 7.5 “Writing to Flash Program Memory”.
When an erase of program memory is executed, the
12 MSbs of the Table Pointer register point to the
1024-byte block that will be erased. The Least
Significant bits are ignored.
Figure 7-3 describes the relevant boundaries of
TBLPTR based on Flash program memory operations.
TABLE 7-1:
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
FIGURE 7-3:
TABLE POINTER BOUNDARIES BASED ON OPERATION
Example
Operation on Table Pointer
TBLRD*
TBLWT*
TBLPTR is not modified
TBLRD*+
TBLWT*+
TBLPTR is incremented after the read/write
TBLRD*-
TBLWT*-
TBLPTR is decremented after the read/write
TBLRD+*
TBLWT+*
TBLPTR is incremented before the read/write
21
16
15
8
7
0
ERASE: TBLPTR<20:10>
TABLE WRITE: TBLPTR<20:6>
TABLE READ: TBLPTR<21:0>
TBLPTRL
TBLPTRH
TBLPTRU