Microchip Technology MA330019-2 Data Sheet

Page of 436
© 2007-2012 Microchip Technology Inc.
DS70292G-page 119
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 7-24:
IPC9: INTERRUPT PRIORITY CONTROL REGISTER 9
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
bit 15
bit 8
U-0
U-0
U-0
U-0
U-0
R/W-1
R/W-0
R/W-0
DMA3IP<2:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-3
Unimplemented: Read as ‘0’
bit 2-0
DMA3IP<2:0>: DMA Channel 3 Data Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled