Microchip Technology MA330019-2 Data Sheet
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
DS70292G-page 356
© 2007-2012 Microchip Technology Inc.
TABLE 30-23: TIMER2 AND TIMER 4 EXTERNAL CLOCK TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
≤ T
A
≤ +85°C for Industrial
-40°C
≤T
A
≤+125°C for Extended
Param
No.
Symbol
Characteristic
(1)
Min
Typ
Max
Units
Conditions
TB10
TtxH
TxCK High
Time
Time
Synchronous
mode
mode
Greater of:
20 or
(T
CY
+ 20)/N
—
—
ns
Must also meet
parameter TB15
N = prescale
value
(1, 8, 64, 256)
parameter TB15
N = prescale
value
(1, 8, 64, 256)
TB11
TtxL
TxCK Low
Time
Time
Synchronous
mode
mode
Greater of:
20 or
(T
CY
+ 20)/N
—
—
ns
Must also meet
parameter TB15
N = prescale
value
(1, 8, 64, 256)
parameter TB15
N = prescale
value
(1, 8, 64, 256)
TB15
TtxP
TxCK
Input
Period
Input
Period
Synchronous
mode
mode
Greater of:
40 or
(2 T
CY
+ 40)/N
—
—
ns
N = prescale
value
(1, 8, 64, 256)
value
(1, 8, 64, 256)
TB20
T
CKEXTMRL
Delay from External TxCK
Clock Edge to Timer Incre-
ment
Clock Edge to Timer Incre-
ment
0.75 T
CY
+ 40
—
1.75 T
CY
+ 40
ns
—
Note 1: These parameters are characterized, but are not tested in manufacturing.
TABLE 30-24: TIMER3 AND TIMER5 EXTERNAL CLOCK TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
≤ T
A
≤ +85°C for Industrial
-40°C
≤T
A
≤+125°C for Extended
Param
No.
Symbol
Characteristic
(1)
Min
Typ
Max
Units
Conditions
TC10
TtxH
TxCK High
Time
Time
Synchronous
T
CY
+ 20
—
—
ns
Must also meet
parameter TC15
parameter TC15
TC11
TtxL
TxCK Low
Time
Time
Synchronous
T
CY
+ 20
—
—
ns
Must also meet
parameter TC15
parameter TC15
TC15
TtxP
TxCK Input
Period
Period
Synchronous,
with prescaler
with prescaler
2 T
CY
+ 40
—
—
ns
N = prescale
value
(1, 8, 64, 256)
value
(1, 8, 64, 256)
TC20
T
CKEXTMRL
Delay from External TxCK
Clock Edge to Timer Incre-
ment
Clock Edge to Timer Incre-
ment
0.75 T
CY
+ 40
—
1.75 T
CY
+ 40
ns
—
Note 1: These parameters are characterized, but are not tested in manufacturing.