Microchip Technology MA330019-2 Data Sheet

2007-20

12 Micro

chip Te

chnology Inc.

DS70292G-p

age

sPIC33FJ32GP302/304, ds

PIC33FJ64GPX02/X04, A

ND dsPIC33FJ128GPX02/X04

TABLE 4-7:

OUTPUT COMPARE REGISTER MAP

SFR Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

OC1RS

0180

Output Compare 1 Secondary Register

xxxx

OC1R

0182

Output Compare 1 Register

xxxx

OC1CON

0184

—

OCSIDL

—

OCFLT

OCTSEL

OCM<2:0>

0000

OC2RS

0186

Output Compare 2 Secondary Register

xxxx

OC2R

0188

Output Compare 2 Register

xxxx

OC2CON

018A

—

OCSIDL

—

OCFLT

OCTSEL

OCM<2:0>

0000

OC3RS

018C

Output Compare 3 Secondary Register

xxxx

OC3R

018E

Output Compare 3 Register

xxxx

OC3CON

0190

—

OCSIDL

—

OCFLT

OCTSEL

OCM<2:0>

0000

OC4RS

0192

Output Compare 4 Secondary Register

xxxx

OC4R

0194

Output Compare 4 Register

xxxx

OC4CON

0196

—

OCSIDL

—

OCFLT

OCTSEL

OCM<2:0>

0000

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-8:

I2C1 REGISTER MAP

SFR Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

I2C1RCV

0200

—

Receive Register

0000

I2C1TRN

0202

—

Transmit Register

00FF

I2C1BRG

0204

—

Baud Rate Generator Register

0000

I2C1CON

0206

I2CEN

—

I2CSIDL

SCLREL

IPMIEN

A10M

DISSLW

SMEN

GCEN

STREN

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

1000

I2C1STAT

0208

ACKSTAT

TRSTAT

—

BCL

GCSTAT

ADD10

IWCOL

I2COV

D_A

R_W

RBF

TBF

0000

I2C1ADD

020A

—

Address Register

0000

I2C1MSK

020C

—

Address Mask Register

0000

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-9:

UART1 REGISTER MAP

SFR Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

U1MODE

0220

UARTEN

—

USIDL

IREN

RTSMD

—

UEN1

UEN0

WAKE

LPBACK

ABAUD

URXINV

BRGH

PDSEL<1:0>

STSEL

0000

U1STA

0222

UTXISEL1

UTXINV UTXISEL0

—

UTXBRK

UTXEN

UTXBF

TRMT

URXISEL<1:0>

ADDEN

RIDLE

PERR

FERR

OERR

URXDA

0110

U1TXREG

0224

—

UTX8

UART Transmit Register

xxxx

U1RXREG

0226

—

URX8

UART Received Register

0000

U1BRG

0228

Baud Rate Generator Prescaler

0000

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.