Microchip Technology DV164136 Data Sheet

Page of 446
PIC18F8722 FAMILY
DS39646C-page 156
© 2008 Microchip Technology Inc.
11.9
PORTJ, TRISJ and 
LATJ Registers
PORTJ is an 8-bit wide, bidirectional port. The corre-
sponding Data Direction register is TRISJ. Setting a
TRISJ bit (= 1) will make the corresponding PORTJ pin
an input (i.e., put the corresponding output driver in a
high-impedance mode). Clearing a TRISJ bit (= 0) will
make the corresponding PORTJ pin an output (i.e., put
the contents of the output latch on the selected pin).
The Data Latch register (LATJ) is also memory
mapped. Read-modify-write operations on the LATJ
register, read and write the latched output value for
PORTJ. 
All pins on PORTJ are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output. 
When the external memory interface is enabled, all of
the PORTJ pins function as control outputs for the
interface. This occurs automatically when the interface
is enabled by clearing the EBDIS control bit
(MEMCON<7>). The TRISJ bits are also overridden.
EXAMPLE 11-9:
INITIALIZING PORTJ      
Note:
PORTJ is available only on
PIC18F8527/8622/8627/8722 devices.
Note:
On a Power-on Reset, these pins are
configured as digital inputs.
CLRF   PORTJ
;
  Initialize PORTJ by
; clearing output
; data latches
CLRF   LATJ
; Alternate method
; to clear output
; data latches
MOVLW
  0xCF
;
  Value used to 
; initialize data       
             
; direction
MOVWF
  TRISJ
;
  Set RJ3:RJ0 as inputs
; RJ5:RJ4 as output
;
  RJ7:RJ6 as inputs