Microchip Technology DV164136 Data Sheet

© 2008 Microchip Technology Inc.

DS39646C-page 187

In the PIC18F8722 family of devices, ECCP1, ECCP2
and ECCP3 are implemented as a standard CCP
module with Enhanced PWM capabilities. These
include the provision for 2 or 4 output channels, user
selectable polarity, dead-band control and automatic
shutdown and restart. The enhanced features are
discussed in detail in Section 18.4 “Enhanced PWM
Mode”. Capture, Compare and single-output PWM
functions of the ECCP module are the same as
described for the standard CCP module.

The control register for the Enhanced CCP modules is
shown in Register 18-1. It differs from the CCPxCON
registers discussed in Section 17.0 “Capture/
Compare/PWM (CCP) Modules” in that the two Most
Significant bits are implemented to control PWM
functionality. In addition to the expanded range of
modes available through the Enhanced CCPxCON
register, the ECCP modules each have two additional
features associated with Enhanced PWM operation
and auto-shutdown features. They are:

• ECCPxDEL (Dead-Band Delay)
• ECCPxAS (Auto-Shutdown Configuration)

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

PxM1

PxM0

DCxB1

DCxB0

CCPxM3

CCPxM2

CCPxM1

CCPxM0

bit 7

bit 0

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

PxM1:PxM0: Enhanced PWM Output Configuration bits
If CCPxM<3:2> = 00, 01, 10:
xx

 = PxA assigned as Capture/Compare input/output; PxB, PxC, PxD assigned as port pins

If CCPxM<3:2> = 11:
00

 = Single output: PxA modulated; PxB, PxC, PxD assigned as port pins

01

 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive

10

 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins

11

 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive

bit 5-4

DCxB<1:0>: PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode: 
Unused.
PWM mode: 
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found
in CCPRxL.

bit 3-0

CCPxM3:CCPxM0: Enhanced CCP Mode Select bits

0000

 = Capture/Compare/PWM off (resets ECCPx module)

0001

 = Reserved 

0010

 = Compare mode: toggle output on match

0011

 = Capture mode

0100

 = Capture mode: every falling edge 

0101

 = Capture mode: every rising edge

0110

 = Capture mode: every 4th rising edge 

0111

 = Capture mode: every 16th rising edge

1000

 = Compare mode: initialize ECCPx pin low; set output on compare match (set CCPxIF)

1001

 = Compare mode: initialize ECCPx pin high; clear output on compare match (set CCPxIF)

1010

 = Compare mode: generate software interrupt only; ECCPx pin reverts to I/O state

1011

 = Compare mode: trigger special event (ECCP resets TMR1 or TMR3, sets CCPxIF bit; ECCP2

trigger starts A/D conversion if A/D module is enabled)

1100

 = PWM mode: PxA, PxC active-high; PxB, PxD active-high

1101

 = PWM mode: PxA, PxC active-high; PxB, PxD active-low

1110

 = PWM mode: PxA, PxC active-low; PxB, PxD active-high

1111

 = PWM mode: PxA, PxC active-low; PxB, PxD active-low