Microchip Technology DV164136 Data Sheet
PIC18F8722 FAMILY
DS39646C-page 192
© 2008 Microchip Technology Inc.
18.1.3
ECCP MODULES AND TIMER
RESOURCES
RESOURCES
Like the standard CCP modules, the ECCP modules
can utilize Timers 1, 2, 3 or 4, depending on the mode
selected. Timer1 and Timer3 are available for modules
in Capture or Compare modes, while Timer2 and
Timer4 are available for modules in PWM mode.
Additional details on timer resources are provided in
Section 17.1.1 “CCP Modules and Timer
Resources”.
can utilize Timers 1, 2, 3 or 4, depending on the mode
selected. Timer1 and Timer3 are available for modules
in Capture or Compare modes, while Timer2 and
Timer4 are available for modules in PWM mode.
Additional details on timer resources are provided in
Section 17.1.1 “CCP Modules and Timer
Resources”.
18.2
Capture and Compare Modes
With the exception of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCP modules are identical in operation to that of
CCP4. These are discussed in detail in Section 17.2
“Capture Mode” and Section 17.3 “Compare
Mode”.
discussed below, the Capture and Compare modes of
the ECCP modules are identical in operation to that of
CCP4. These are discussed in detail in Section 17.2
“Capture Mode” and Section 17.3 “Compare
Mode”.
18.2.1
SPECIAL EVENT TRIGGER
The Special Event Trigger output of ECCPx resets the
TMR1 or TMR3 register pair, depending on which timer
resource is currently selected. This allows the CCPRx
registers to effectively be 16-bit programmable period
registers for Timer1 or Timer3.
TMR1 or TMR3 register pair, depending on which timer
resource is currently selected. This allows the CCPRx
registers to effectively be 16-bit programmable period
registers for Timer1 or Timer3.
18.3
Standard PWM Mode
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode as described in Section 17.4
“PWM Mode”. This is also sometimes referred to as
“Compatible CCP” mode as in Tables 18-1
through 18-3.
module functions identically to the standard CCP
module in PWM mode as described in Section 17.4
“PWM Mode”. This is also sometimes referred to as
“Compatible CCP” mode as in Tables 18-1
through 18-3.
18.4
Enhanced PWM Mode
The Enhanced PWM mode provides additional PWM
output options for a broader range of control applica-
tions. The module is a backward compatible version of
the standard CCP module and offers up to four outputs,
designated PxA through PxD. Users are also able to
select the polarity of the signal (either active-high or
active-low). The module’s output mode and polarity
are configured by setting the PxM<1:0> and
CCPxM<3:0> bits of the CCPxCON register
(CCPxCON<7:6> and CCPxCON<3:0>, respectively).
output options for a broader range of control applica-
tions. The module is a backward compatible version of
the standard CCP module and offers up to four outputs,
designated PxA through PxD. Users are also able to
select the polarity of the signal (either active-high or
active-low). The module’s output mode and polarity
are configured by setting the PxM<1:0> and
CCPxM<3:0> bits of the CCPxCON register
(CCPxCON<7:6> and CCPxCON<3:0>, respectively).
For the sake of clarity, Enhanced PWM mode operation
is described generically throughout this section with
respect to ECCP1 and TMR2 modules. Control register
names are presented in terms of ECCP1. All three
Enhanced modules, as well as the two timer resources,
can be used interchangeably and function identically.
TMR2 or TMR4 can be selected for PWM operation by
selecting the proper bits in T3CON.
is described generically throughout this section with
respect to ECCP1 and TMR2 modules. Control register
names are presented in terms of ECCP1. All three
Enhanced modules, as well as the two timer resources,
can be used interchangeably and function identically.
TMR2 or TMR4 can be selected for PWM operation by
selecting the proper bits in T3CON.
Figure 18-1 shows a simplified block diagram of PWM
operation. All control registers are double-buffered and
are loaded at the beginning of a new PWM cycle (the
period boundary when Timer2 resets) in order to
prevent glitches on any of the outputs. The exception is
the PWM Dead-Band Delay register, ECCP1DEL,
which is loaded at either the duty cycle boundary or the
boundary period (whichever comes first). Because of
the buffering, the module waits until the assigned timer
resets instead of starting immediately. This means that
Enhanced PWM waveforms do not exactly match the
standard PWM waveforms, but are instead offset by
one full instruction cycle (4 T
operation. All control registers are double-buffered and
are loaded at the beginning of a new PWM cycle (the
period boundary when Timer2 resets) in order to
prevent glitches on any of the outputs. The exception is
the PWM Dead-Band Delay register, ECCP1DEL,
which is loaded at either the duty cycle boundary or the
boundary period (whichever comes first). Because of
the buffering, the module waits until the assigned timer
resets instead of starting immediately. This means that
Enhanced PWM waveforms do not exactly match the
standard PWM waveforms, but are instead offset by
one full instruction cycle (4 T
OSC
).
As before, the user must manually configure the
appropriate TRIS bits for output.
appropriate TRIS bits for output.
18.4.1
PWM PERIOD
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following equation:
register. The PWM period can be calculated using the
following equation:
EQUATION 18-1:
PWM frequency is defined as 1/[PWM period]. When
TMR2 is equal to PR2, the following three events occur
on the next increment cycle:
TMR2 is equal to PR2, the following three events occur
on the next increment cycle:
• TMR2 is cleared
• The ECCP1 pin is set (if PWM duty cycle = 0%,
• The ECCP1 pin is set (if PWM duty cycle = 0%,
the ECCP1 pin will not be set)
• The PWM duty cycle is copied from CCPR1L into
CCPR1H
Note:
When setting up single output PWM
operations, users are free to use either of
the processes described in Section 17.4.3
“Setup for PWM Operation” or
Section 18.4.9 “Setup for PWM Opera-
tion”. The latter is more generic, but will
work for either single or multi-output PWM.
operations, users are free to use either of
the processes described in Section 17.4.3
“Setup for PWM Operation” or
Section 18.4.9 “Setup for PWM Opera-
tion”. The latter is more generic, but will
work for either single or multi-output PWM.
Note:
The Timer2 postscaler (see Section 14.0
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
PWM Period =
[(PR2) + 1] • 4 • T
OSC
•
(TMR2 Prescale Value)