Microchip Technology DV164136 Data Sheet
© 2008 Microchip Technology Inc.
DS39646C-page 241
PIC18F8722 FAMILY
19.4.17.1
Bus Collision During a Start
Condition
Condition
During a Start condition, a bus collision occurs if:
a)
SDAx or SCLx are sampled low at the beginning
of the Start condition (Figure 19-26).
of the Start condition (Figure 19-26).
b)
SCLx is sampled low before SDAx is asserted
low (Figure 19-27).
low (Figure 19-27).
During a Start condition, both the SDAx and the SCLx
pins are monitored.
pins are monitored.
If the SDAx pin is already low, or the SCLx pin is
already low, then all of the following occur:
• the Start condition is aborted,
• the BCLxIF flag is set and
• the MSSP module is reset to its inactive state
already low, then all of the following occur:
• the Start condition is aborted,
• the BCLxIF flag is set and
• the MSSP module is reset to its inactive state
The Start condition begins with the SDAx and SCLx
pins deasserted. When the SDAx pin is sampled high,
the Baud Rate Generator is loaded from
SSPxADD<6:0> and counts down to ‘0’. If the SCLx pin
is sampled low while SDAx is high, a bus collision
occurs because it is assumed that another master is
attempting to drive a data ‘1’ during the Start condition.
pins deasserted. When the SDAx pin is sampled high,
the Baud Rate Generator is loaded from
SSPxADD<6:0> and counts down to ‘0’. If the SCLx pin
is sampled low while SDAx is high, a bus collision
occurs because it is assumed that another master is
attempting to drive a data ‘1’ during the Start condition.
If the SDAx pin is sampled low during this count, the
BRG is reset and the SDAx line is asserted early
(Figure 19-28). If, however, a ‘1’ is sampled on the
SDAx pin, the SDAx pin is asserted low at the end of
the BRG count. The Baud Rate Generator is then
reloaded and counts down to ‘0’. If the SCLx pin is
sampled as ‘0’ during this time, a bus collision does not
occur. At the end of the BRG count, the SCLx pin is
asserted low.
BRG is reset and the SDAx line is asserted early
(Figure 19-28). If, however, a ‘1’ is sampled on the
SDAx pin, the SDAx pin is asserted low at the end of
the BRG count. The Baud Rate Generator is then
reloaded and counts down to ‘0’. If the SCLx pin is
sampled as ‘0’ during this time, a bus collision does not
occur. At the end of the BRG count, the SCLx pin is
asserted low.
FIGURE 19-26:
BUS COLLISION DURING START CONDITION (SDAx ONLY)
Note:
The reason that bus collision is not a factor
during a Start condition is that no two bus
masters can assert a Start condition at the
exact same time. Therefore, one master
will always assert SDAx before the other.
This condition does not cause a bus colli-
sion because the two masters must be
allowed to arbitrate the first address
following the Start condition. If the address
is the same, arbitration must be allowed to
continue into the data portion, Repeated
Start or Stop conditions.
during a Start condition is that no two bus
masters can assert a Start condition at the
exact same time. Therefore, one master
will always assert SDAx before the other.
This condition does not cause a bus colli-
sion because the two masters must be
allowed to arbitrate the first address
following the Start condition. If the address
is the same, arbitration must be allowed to
continue into the data portion, Repeated
Start or Stop conditions.
SDAx
SCLx
SEN
SDAx sampled low before
SDAx goes low before the SEN bit is set.
S bit and SSPxIF set because
MSSP module reset into Idle state.
SEN cleared automatically because of bus collision.
S bit and SSPxIF set because
Set SEN, enable Start
condition if SDAx = 1, SCLx = 1
SDAx = 0, SCLx = 1.
BCLxIF
S
SSPxIF
SDAx = 0, SCLx = 1.
SSPxIF and BCLxIF are
cleared in software
cleared in software
SSPxIF and BCLxIF are
cleared in software
cleared in software
Set BCLxIF,
Start condition. Set BCLxIF.