Microchip Technology DV164136 Data Sheet

Page of 446
© 2008 Microchip Technology Inc.
DS39646C-page 277
PIC18F8722 FAMILY
21.2
Selecting and Configuring 
Acquisition Time
The ADCON2 register allows the user to select an
acquisition time that occurs each time the GO/DONE
bit is set. It also gives users the option to use an
automatically determined acquisition time.
Acquisition time may be set with the ACQT<2:0> bits
(ADCON2<5:3>) which provides a range of 2 to 20 T
AD
.
When the GO/DONE bit is set, the A/D module
continues to sample the input for the selected acquisi-
tion time, then automatically begins a conversion.
Since the acquisition time is programmed, there may
be no need to wait for an acquisition time between
selecting a channel and setting the GO/DONE bit.
Manual acquisition is selected when
ACQT<2:0> = 000. When the GO/DONE bit is set,
sampling is stopped and a conversion begins. The user
is responsible for ensuring the required acquisition time
has passed between selecting the desired input
channel and setting the GO/DONE bit. This option is
also the default Reset state of the ACQT<2:0> bits and
is compatible with devices that do not offer
programmable acquisition times.
In either case, when the conversion is completed, the
GO/DONE bit is cleared, the ADIF flag is set and the
A/D begins sampling the currently selected channel
again. If an acquisition time is programmed, there is
nothing to indicate if the acquisition time has ended or
if the conversion has begun.
21.3
Selecting the A/D Conversion 
Clock
The A/D conversion time per bit is defined as T
AD
. The
A/D conversion requires 11 T
AD
 per 10-bit conversion.
The source of the A/D conversion clock is software
selectable. There are seven possible options for T
AD
• 2  T
OSC
• 4  T
OSC
• 8  T
OSC
• 16  T
OSC
• 32  T
OSC
 
• 64  T
OSC
• Internal RC Oscillator
For correct A/D conversions, the A/D conversion clock
(T
AD
) must be as short as possible, but greater than the
minimum T
AD
 (see parameter 130, Table 28-27 for
more information).
Table 21-1 shows the resultant T
AD
 times derived from
the device operating frequencies and the A/D clock
source selected.
TABLE 21-1:
T
AD
 vs. DEVICE OPERATING FREQUENCIES       
AD Clock Source (T
AD
)
Maximum Device Frequency
Operation
ADCS<2:0>
PIC18FXXXX
PIC18LFXXXX
(4)
2 T
OSC
000
2.86 MHz
1.43 kHz
4 T
OSC
100
5.71 MHz
2.86 MHz
8 T
OSC
001
11.43 MHz
5.72 MHz
16 T
OSC
101
22.86 MHz
11.43 MHz
32 T
OSC
010
40.0 MHz
22.86 MHz
64 T
OSC
110
40.0 MHz
22.86 MHz
RC
(3)
x11
1.00 MHz
(1)
1.00 MHz
(2)
Note 1:
The RC source has a typical T
AD
 time of 1.2 
μs.
2:
The RC source has a typical T
AD
 time of 2.5 
μs.
3:
For device frequencies above 1 MHz, the device must be in Sleep for the entire conversion or the A/D 
accuracy may be out of specification.
4:
Low-power (PIC18LFXXXX) devices only.