Microchip Technology DV164136 Data Sheet
© 2008 Microchip Technology Inc.
DS39646C-page 303
PIC18F8722 FAMILY
REGISTER 25-5:
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
R/P-1
U-0
U-0
U-0
U-0
R/P-0
R/P-1
R/P-1
MCLRE
—
—
—
—
LPT1OSC
ECCPMX
CCP2MX
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
MCLRE: MCLR Pin Enable bit
1
= MCLR pin enabled; RG5 input pin disabled
0
= RG5 input pin enabled; MCLR disabled
bit 6-3
Unimplemented: Read as ‘0’
bit 2
LPT1OSC: Low-Power Timer1 Oscillator Enable bit
1
= Timer1 configured for low-power operation
0
= Timer1 configured for higher power operation
bit 1
ECCPMX: ECCP MUX bit
(1)
1
= ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively
0
= ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively
bit 0
CCP2MX: CCP2 MUX bit
1
= ECCP2 input/output is multiplexed with RC1
0
= ECCP2 input/output is multiplexed with RB3 in Extended Microcontroller, Microprocessor or
Microprocessor with Boot Block mode
(1)
. ECCP2 is multiplexed with RE7 in Microcontroller mode.
Note 1:
This feature is only available on PIC18F8527/8622/8627/8722 devices.