Microchip Technology DV164136 Data Sheet

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PIC18F8722 FAMILY
DS39646C-page 56
© 2008 Microchip Technology Inc.
4.6
Reset State of Registers
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. All other registers are forced to a “Reset state”
depending on the type of Reset that occurred. 
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal oper-
ation. Status bits from the RCON register, RI, TO, PD,
POR and BOR, are set or cleared differently in different
Reset situations, as indicated in Table 4-3. These bits
are used in software to determine the nature of the
Reset. 
Table 4-4 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
TABLE 4-3:
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION 
FOR RCON REGISTER 
Condition
Program 
Counter
RCON Register
STKPTR Register
SBOREN
RI
TO
PD
POR BOR
STKFUL
STKUNF
Power-on Reset
0000h
1
1
1
1
0
0
0
0
RESET
 Instruction
0000h
u
(2)
0
u
u
u
u
u
u
Brown-out Reset
0000h
u
(2)
1
1
1
u
0
u
u
MCLR during Power-Managed 
Run Modes
0000h
u
(2)
u
1
u
u
u
u
u
MCLR during Power-Managed 
Idle Modes and Sleep Mode
0000h
u
(2)
u
1
0
u
u
u
u
WDT Time-out during Full Power 
or Power-Managed Run Mode
0000h
u
(2)
u
0
u
u
u
u
u
MCLR during Full Power 
Execution
0000h
u
(2)
u
u
u
u
u
u
u
Stack Full Reset (STVREN = 1)
0000h
u
(2)
u
u
u
u
u
1
u
Stack Underflow Reset 
(STVREN = 1)
0000h
u
(2)
u
u
u
u
u
u
1
Stack Underflow Error (not an 
actual Reset, STVREN = 0)
0000h
u
(2)
u
u
u
u
u
u
1
WDT Time-out during 
Power-Managed Idle or 
Sleep Modes
PC + 2
u
(2)
u
0
0
u
u
u
u
Interrupt Exit from 
Power-Managed Modes
PC + 2
(1)
u
(2)
u
u
0
u
u
u
u
Legend: u = unchanged
Note 1:
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the 
interrupt vector (008h or 0018h).
2:
Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled 
(BOREN<1:0> Configuration bits = 01 and SBOREN = 1). Otherwise, the Reset state is ‘0’.