Microchip Technology DV164136 Data Sheet
© 2008 Microchip Technology Inc.
DS39646C-page 75
PIC18F8722 FAMILY
5.3.4
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
the top half of Bank 15 (F60h to FFFh). A list of these
registers is given in Table 5-2 and Table 5-3.
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
the top half of Bank 15 (F60h to FFFh). A list of these
registers is given in Table 5-2 and Table 5-3.
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this sec-
tion. Registers related to the operation of a peripheral
feature are described in the chapter for that peripheral.
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this sec-
tion. Registers related to the operation of a peripheral
feature are described in the chapter for that peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
TABLE 5-2:
SPECIAL FUNCTION REGISTER MAP FOR THE PIC18F8722 FAMILY OF DEVICES
Address
Name
Address
Name
Address
Name
Address
Name
Address
Name
FFFh
TOSU
FDFh
INDF2
(1)
FBFh
CCPR1H
F9Fh
IPR1
F7Fh
SPBRGH1
FFEh
TOSH
FDEh
POSTINC2
(1)
FBEh
CCPR1L
F9Eh
PIR1
F7Eh
BAUDCON1
FFDh
TOSL
FDDh POSTDEC2
(1)
FBDh
CCP1CON
F9Dh
PIE1
F7Dh
SPBRGH2
FFCh
STKPTR
FDCh
PREINC2
(1)
FBCh
CCPR2H
F9Ch
MEMCON
F7Ch
BAUDCON2
FFBh
PCLATU
FDBh
PLUSW2
(1)
FBBh
CCPR2L
F9Bh
OSCTUNE
F7Bh
—
(2)
FFAh
PCLATH
FDAh
FSR2H
FBAh
CCP2CON
F9Ah
TRISJ
(3)
F7Ah
—
(2)
FF9h
PCL
FD9h
FSR2L
FB9h
CCPR3H
F99h
TRISH
(3)
F79h
ECCP1DEL
FF8h
TBLPTRU
FD8h
STATUS
FB8h
CCPR3L
F98h
TRISG
F78h
TMR4
FF7h
TBLPTRH
FD7h
TMR0H
FB7h
CCP3CON
F97h
TRISF
F77h
PR4
FF6h
TBLPTRL
FD6h
TMR0L
FB6h
ECCP1AS
F96h
TRISE
F76h
T4CON
FF5h
TABLAT
FD5h
T0CON
FB5h
CVRCON
F95h
TRISD
F75h
CCPR4H
FF4h
PRODH
FD4h
—
(2)
FB4h
CMCON
F94h
TRISC
F74h
CCPR4L
FF3h
PRODL
FD3h
OSCCON
FB3h
TMR3H
F93h
TRISB
F73h
CCP4CON
FF2h
INTCON
FD2h
HLVDCON
FB2h
TMR3L
F92h
TRISA
F72h
CCPR5H
FF1h
INTCON2
FD1h
WDTCON
FB1h
T3CON
F91h
LATJ
(3)
F71h
CCPR5L
FF0h
INTCON3
FD0h
RCON
FB0h
PSPCON
F90h
LATH
(3)
F70h
CCP5CON
FEFh
INDF0
(1)
FCFh
TMR1H
FAFh
SPBRG1
F8Fh
LATG
F6Fh
SPBRG2
FEEh
POSTINC0
(1)
FCEh
TMR1L
FAEh
RCREG1
F8Eh
LATF
F6Eh
RCREG2
FEDh POSTDEC0
(1)
FCDh
T1CON
FADh
TXREG1
F8Dh
LATE
F6Dh
TXREG2
FECh
PREINC0
(1)
FCCh
TMR2
FACh
TXSTA1
F8Ch
LATD F6Ch
TXSTA2
FEBh
PLUSW0
(1)
FCBh
PR2
FABh
RCSTA1
F8Bh
LATC
F6Bh
RCSTA2
FEAh
FSR0H
FCAh
T2CON
FAAh
EEADRH
F8Ah
LATB
F6Ah
ECCP3AS
FE9h
FSR0L
FC9h
SSP1BUF
FA9h
EEADR
F89h
LATA
F69h
ECCP3DEL
FE8h
WREG
FC8h
SSP1ADD
FA8h
EEDATA
F88h
PORTJ
(3)
F68h
ECCP2AS
FE7h
INDF1
(1)
FC7h
SSP1STAT
FA7h
EECON2
(1)
F87h
PORTH
(3)
F67h
ECCP2DEL
FE6h
POSTINC1
(1)
FC6h
SSP1CON1
FA6h
EECON1
F86h
PORTG
F66h
SSP2BUF
FE5h POSTDEC1
(1)
FC5h
SSP1CON2
FA5h
IPR3
F85h
PORTF
F65h
SSP2ADD
FE4h
PREINC1
(1)
FC4h
ADRESH
FA4h
PIR3
F84h
PORTE
F64h
SSP2STAT
FE3h
PLUSW1
(1)
FC3h
ADRESL
FA3h
PIE3
F83h
PORTD
F63h
SSP2CON1
FE2h
FSR1H
FC2h
ADCON0
FA2h
IPR2
F82h
PORTC
F62h
SSP2CON2
FE1h
FSR1L
FC1h
ADCON1
FA1h
PIR2
F81h
PORTB
F61h
—
(2)
FE0h
BSR
FC0h
ADCON2
FA0h
PIE2
F80h
PORTA
F60h
—
(2)
Note
1:
This is not a physical register.
2:
Unimplemented registers are read as ‘0’.
3:
This register is not available on 64-pin devices.