Microchip Technology DV164136 Data Sheet
2007-2012 Microchip Technology Inc.
DS39778E-page 219
PIC18F87J11 FAMILY
19.0
ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULE
COMPARE/PWM (ECCP)
MODULE
In the PIC18F87J11 family of devices, three of the CCP
modules are implemented as standard CCP modules
with Enhanced PWM capabilities. These include the
provision for 2 or 4 output channels, user-selectable
polarity, dead-band control and automatic shutdown
and restart. The Enhanced features are discussed in
detail in
modules are implemented as standard CCP modules
with Enhanced PWM capabilities. These include the
provision for 2 or 4 output channels, user-selectable
polarity, dead-band control and automatic shutdown
and restart. The Enhanced features are discussed in
detail in
Capture, Compare and single-output PWM functions of
the ECCP module are the same as described for the
standard CCP module.
the ECCP module are the same as described for the
standard CCP module.
. It differs from the CCP4CON/
CCP5CON registers in that the two Most Significant
bits are implemented to control PWM functionality.
In addition to the expanded range of modes available
through the Enhanced CCPxCON register, the ECCP
modules each have two additional registers associated
with Enhanced PWM operation and auto-shutdown
features. They are:
• ECCPxDEL (ECCPx PWM Delay)
• ECCPxAS (ECCPx Auto-Shutdown Control)
bits are implemented to control PWM functionality.
In addition to the expanded range of modes available
through the Enhanced CCPxCON register, the ECCP
modules each have two additional registers associated
with Enhanced PWM operation and auto-shutdown
features. They are:
• ECCPxDEL (ECCPx PWM Delay)
• ECCPxAS (ECCPx Auto-Shutdown Control)
REGISTER 19-1:
CCPxCON: ECCPx CONTROL REGISTER (ECCP1/ECCP2/ECCP3)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
PxM1
PxM0
DCxB1
DCxB0
CCPxM3
CCPxM2
CCPxM1
CCPxM0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
PxM<1:0>:
Enhanced PWM Output Configuration bits
If CCPxM<3:2> = 00, 01, 10:
xx
xx
= PxA is assigned as Capture/Compare input/output; PxB, PxC, PxD are assigned as port pins
If CCPxM<3:2> = 11:
00
00
= Single output: PxA modulated; PxB, PxC, PxD assigned as port pins
01
= Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10
= Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
11
= Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive
bit 5-4
DCxB<1:0>:
PWM Duty Cycle Bit 1 and Bit 0 bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found in
CCPRxL.
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found in
CCPRxL.
Note 1:
Implemented only for ECCP1 and ECCP2; the same as ‘1010’ for ECCP3.