Microchip Technology DV164136 Data Sheet

Page of 466
 2007-2012 Microchip Technology Inc.
 
DS39778E-page 283
PIC18F87J11 FAMILY
TABLE 20-4:
REGISTERS ASSOCIATED WITH I
2
C™ OPERATION    
   
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset 
Values 
on Page:
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
PIR1
PMPIF
ADIF
RC1IF
TX1IF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
PIE1
PMPIE
ADIE
RC1IE
TX1IE
SSP1IE
CCP1IE
TMR2IE
TMR1IE
IPR1
PMPIP
ADIP
RC1IP
TX1IP
SSP1IP
CCP1IP
TMR2IP
TMR1IP
PIR2
OSCFIF
CM2IF
CM1IF
BCL1IF
LVDIF
TMR3IF
CCP2IF
PIE2
OSCFIE
CM2IE
CM1IE
BCL1IE
LVDIE
TMR3IE
CCP2IE
IPR2
OSCFIP
CM2IP
CM1IP
BCL1IP
LVDIP
TMR3IP
CCP2IP
PIR3
SSP2IF
BCL2IF
RC2IF
TX2IF
TMR4IF
CCP5IF
CCP4IF
CCP3IF
64
PIE3
SSP2IE
BCL2IE
RC2IE
TX2IE
TMR4IE
CCP5IE
CCP4IE
CCP3IE
IPR3
SSP2IP
BCL2IP
RC2IP
TX2IP
TMR4IP
CCP5IP
CCP4IP
CCP3IP
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
TRISD
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
SSP1BUF
MSSP1 Receive Buffer/Transmit Register
SSP1ADD
MSSP1 Address Register (I
2
C™ Slave mode), 
MSSP1 Baud Rate Reload Register (I
2
C Master mode)
SSP1MSK
)
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
SSP1CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
SSP1CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
GCEN
ACKSTAT ADMSK5
ADMSK4
)
ADMSK3
)
ADMSK2
)
ADMSK1
SEN
SSP1STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
SSP2BUF
MSSP2 Receive Buffer/Transmit Register
SSP2ADD
MSSP2 Address Register (I
2
C Slave mode), 
MSSP2 Baud Rate Reload Register (I
2
C Master mode)
SSP2MSK
)
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
SSP2CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
SSP2CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
GCEN
ACKSTAT ADMSK5
ADMSK4
)
ADMSK3
)
ADMSK2
)
ADMSK1
SEN
SSP2STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
Legend: 
 = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C mode.
Note 1:
SSPxMSK shares the same address in SFR space as SSPxADD, but is only accessible in certain I
2
C™ 
Slave operating modes in 7-Bit Masking mode. See 
 fo
more details.
2:
Alternate bit definitions for use in I
2
C Slave mode operations only.