Microchip Technology DV164136 Data Sheet
PIC18F87J11 FAMILY
DS39778E-page 328
2007-2012 Microchip Technology Inc.
24.1
Configuring the Comparator
Voltage Reference
Voltage Reference
The comparator voltage reference module is controlled
through the CVRCON register (
through the CVRCON register (
comparator voltage reference provides two ranges of
output voltage, each with 16 distinct levels. The range
to be used is selected by the CVRR bit (CVRCON<5>).
The primary difference between the ranges is the size
of the steps selected by the CV
output voltage, each with 16 distinct levels. The range
to be used is selected by the CVRR bit (CVRCON<5>).
The primary difference between the ranges is the size
of the steps selected by the CV
REF
Selection bits
(CVR<3:0>), with one range offering finer resolution.
The equations used to calculate the output of the
comparator voltage reference are as follows:
The equations used to calculate the output of the
comparator voltage reference are as follows:
If CVRR = 1:
CV
CV
REF
= ((CVR<3:0>)/24) x (CV
RSRC
)
If CVRR = 0:
CV
CV
REF
= (CV
RSRC
/4) + ((CVR<3:0>)/32) x (CV
RSRC
)
The comparator reference supply voltage can come
from either V
from either V
DD
and V
SS
, or the external V
REF
+ and
V
REF
- that are multiplexed with RA2 and RA3. The
voltage source is selected by the CVRSS bit
(CVRCON<4>).
The settling time of the comparator voltage refer-
ence must be considered when changing the CV
(CVRCON<4>).
The settling time of the comparator voltage refer-
ence must be considered when changing the CV
REF
output (see
in
The CVRCON register is a shared address SFR and
uses the same address as the PR4 register. The
CVRCON register is accessed by setting the ADSHR
bit (WDTCON<4>).
uses the same address as the PR4 register. The
CVRCON register is accessed by setting the ADSHR
bit (WDTCON<4>).
REGISTER 24-1:
CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CVREN
CVROE
CVRR
CVRSS
CVR3
CVR2
CVR1
CVR0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CVREN:
Comparator Voltage Reference Enable bit
1
= CV
REF
circuit is powered on
0
= CV
REF
circuit is powered down
bit 6
CVROE:
Comparator V
REF
Output Enable bit
(
)
1
= CV
REF
voltage level is also output on the RF5/AN10/C1INB/CV
REF
pin
0
= CV
REF
voltage is disconnected from the RF5/AN10/C1INB/CV
REF
pin
bit 5
CVRR:
Comparator V
REF
Range Selection bit
1
= 0 to 0.667 CV
RSRC
, with CV
RSRC
/24 step size (low range)
0
= 0.25 CV
RSRC
to 0.75 CV
RSRC
, with CV
RSRC
/32 step size (high range)
bit 4
CVRSS:
Comparator V
REF
Source Selection bit
1
= Comparator reference source, CV
RSRC
= (V
REF
+) – (V
REF
-)
0
= Comparator reference source, CV
RSRC
= AV
DD
– AV
SS
bit 3-0
CVR<3:0>:
Comparator V
REF
Value Selection bits (0
(CVR3:CVR0) 15)
When CVRR = 1:
CV
CV
REF
= ((CVR<3:0>)/24)
(CV
RSRC
)
When CVRR = 0:
CV
CV
REF
= (CV
RSRC
/4) + ((CVR<3:0>)/32)
(CV
RSRC
)
Note 1:
CVROE overrides the TRISF<5> bit setting.