Microchip Technology DV164136 Data Sheet

Page of 466
PIC18F87J11 FAMILY
DS39778E-page 426
 
 2007-2012 Microchip Technology Inc.
FIGURE 28-10:
PARALLEL SLAVE PORT TIMING 
TABLE 28-16: PARALLEL SLAVE PORT REQUIREMENTS 
   
Param.
No.
Symbol
Characteristic
Min
Max
Units
Conditions
PS1
TdtV2wrH
Data In Valid Before PMWR or PMCSx Inactive 
(setup time)
20
ns
PS2
TwrH2dtI
PMWR or PMCSx Inactive to Data–In Invalid 
(hold time) 
20
ns
PS3
TrdL2dtV
PMRD and PMCSx Active to Data–Out Valid
80
ns
PS4
TrdH2dtI
PMRD Active
or PMCSx Inactive to Data–Out 
Invalid
10
30
ns
PMCSx
PMRD
PMWR
PMD<7:0>
PS1
PS2
PS3
PS4
Note:
Refer to 
 for load conditions.