Microchip Technology DV164136 Data Sheet
2007-2012 Microchip Technology Inc.
DS39778E-page 97
PIC18F87J11 FAMILY
REGISTER 7-1:
EECON1: EEPROM CONTROL REGISTER 1
U-0
U-0
R/W-0
R/W-0
R/W-x
R/W-0
R/S-0
U-0
—
—
WPROG
FREE
WRERR
WREN
WR
—
bit 7
bit 0
Legend:
S = Settable bit (cannot be cleared in software)
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented:
Read as ‘0’
bit 5
WPROG:
One Word-Wide Program bit
1
= Programs 2 bytes on the next WR command
0
= Programs 64 bytes on the next WR command
bit 4
FREE:
Flash Row Erase Enable bit
1
= Erases the program memory row addressed by TBLPTR on the next WR command
(cleared by completion of erase operation)
0
= Performs write only
bit 3
WRERR:
Flash Program Error Flag bit
1
= A write operation is prematurely terminated (any Reset during self-timed programming in normal
operation or an improper write attempt)
0
= The write operation completed
bit 2
WREN:
Flash Program Write Enable bit
1
= Allows write cycles to Flash program memory
0
= Inhibits write cycles to Flash program memory
bit 1
WR:
Write Control bit
1
= Initiates a program memory erase cycle or write cycle
(The operation is self-timed and the bit is cleared by hardware once write is complete. The WR bit
can only be set (not cleared) in software.)
can only be set (not cleared) in software.)
0
= Write cycle is complete
bit 0
Unimplemented:
Read as ‘0’