Microchip Technology MA330018 Data Sheet

Page of 460
© 2007-2012 Microchip Technology Inc.
DS70291G-page  113
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
    
REGISTER 7-16:
IPC1: INTERRUPT PRIORITY CONTROL REGISTER 1 
U-0
R/W-1
R/W-0
R/W-0
U-0
R/W-1
R/W-0
R/W-0
T2IP<2:0>
OC2IP<2:0>
bit 15
bit 8
U-0
R/W-1
R/W-0
R/W-0
U-0
R/W-1
R/W-0
R/W-0
IC2IP<2:0>
DMA0IP<2:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented: Read as ‘0’
bit 14-12
T2IP<2:0>: Timer2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 11
Unimplemented: Read as ‘0’
bit 10-8
OC2IP<2:0>: Output Compare Channel 2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 7
Unimplemented: Read as ‘0’
bit 6-4
IC2IP<2:0>: Input Capture Channel 2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 3
Unimplemented: Read as ‘0’
bit 2-0
DMA0IP<2:0>: DMA Channel 0 Data Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled