Microchip Technology MA330018 Data Sheet

Page of 460
© 2007-2012 Microchip Technology Inc.
DS70291G-page  127
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 7-30:
IPC18: INTERRUPT PRIORITY CONTROL REGISTER 18 
U-0
R/W-1
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
QEI2IP<2:0>
FLTA2IP<2:0>
bit 15
bit 8
U-0
R/W-1
R/W-0
R/W-0
U-0
U-0
U-0
U-0
PWM2IP<2:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented: Read as ‘0’
bit 14-12
QEI2IP<2:0>: QEI2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 11
Unimplemented: Read as ‘0’
bit 10-8
FLTA2IP<2:0>: PWM2 Fault A Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 7
Unimplemented: Read as ‘0’
bit 6-4
PWM2IP<2:0>: PWM2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)



001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 3-0
Unimplemented: Read as ‘0’