Microchip Technology MA330018 Data Sheet

Page of 460
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
DS70291G-page  144
© 2007-2012 Microchip Technology Inc.
9.1
CPU Clocking System
The dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/
X04 and dsPIC33FJ128MCX02/X04 devices provide 
seven system clock options:
• Fast RC (FRC) Oscillator
• FRC Oscillator with Phase Locked Loop (PLL)
• Primary (XT, HS or EC) Oscillator
• Primary Oscillator with PLL
• Secondary (LP) Oscillator 
• Low-Power RC (LPRC) Oscillator
• FRC Oscillator with postscaler
9.1.1
SYSTEM CLOCK SOURCES
The Fast RC (FRC) internal oscillator runs at a nominal 
frequency of 7.37 MHz. User software can tune the 
FRC frequency. User software can optionally specify a 
factor (ranging from 1:2 to 1:256) by which the FRC 
clock frequency is divided. This factor is selected using 
the FRCDIV<2:0> bits (CLKDIV<10:8>).
The primary oscillator can use one of the following as 
its clock source:
• Crystal (XT): Crystals and ceramic resonators in 
the range of 3 MHz to 10 MHz. The crystal is 
connected to the OSC1 and OSC2 pins.
• High-Speed Crystal (HS): Crystals in the range of 
10 MHz to 40 MHz. The crystal is connected to 
the OSC1 and OSC2 pins.
• External Clock (EC): External clock signal is 
directly applied to the OSC1 pin.
The secondary (LP) oscillator is designed for low power 
and uses a 32.768 kHz crystal or ceramic resonator. 
The LP oscillator uses the SOSCI and SOSCO pins.
The Low-Power RC (LPRC) internal oscIllator runs at a 
nominal frequency of 32.768 kHz. It is also used as a 
reference clock by the Watchdog Timer (WDT) and 
Fail-Safe Clock Monitor (FSCM).
The clock signals generated by the FRC and primary 
oscillators can be optionally applied to an on-chip PLL
to provide a wide range of output frequencies for device 
operation. PLL configuration is described in 
The FRC frequency depends on the FRC accuracy 
(see 
and the value of the FRC Oscillator 
Tuning register (see 
).
9.1.2
SYSTEM CLOCK SELECTION
The oscillator source used at a device Power-on 
Reset event is selected by using the Configuration bit 
settings. The oscillator Configuration bit settings are 
located in the Configuration registers in the program 
memory. (Refer to 
 for further details.) The Initial Oscillator 
Selection Configuration bits, FNOSC<2:0> 
(FOSCSEL<2:0>), and the Primary Oscillator Mode 
Select Configuration bits, POSCMD<1:0> 
(FOSC<1:0>), select the oscillator source that is used 
at a Power-on Reset. The FRC primary oscillator is 
the default (unprogrammed) selection.
The Configuration bits allow users to choose among 12 
different clock modes, shown in 
.
The output of the oscillator (or the output of the PLL 
if a PLL mode has been selected) F
OSC
 is divided by 
2 to generate the device instruction clock (F
CY
) and 
the peripheral clock time base (F
P
). F
CY
 defines the 
operating speed of the device, and speeds up to 
40 MHz are supported by the dsPIC33FJ32MC302/
304, dsPIC33FJ64MCX02/X04 and 
dsPIC33FJ128MCX02/X04 architecture.
Instruction execution speed or device operating 
frequency, F
CY
, is given by: 
EQUATION 9-1:
DEVICE OPERATING 
FREQUENCY
9.1.3
AUXILIARY OSCILLATOR
The Auxiliary Oscillator (AOSC) can be used for 
peripheral that needs to operate at a frequency 
unrelated to the system clock such as DAC.
The Auxiliary Oscillator can use one of the following as 
its clock source:
• Crystal (XT): Crystal and ceramic resonators in 
the range of 3 MHz to 10 MHz. The crystal is 
connected to the SOCI and SOSCO pins.
• High-Speed Crystal (HS): Crystals in the range of 
10 to 40 Hz. The crystal is connected to the 
SOSCI and SOSCO pins.
• External Clock (EC): External clock signal up to 
64 MHz. The external clock signal is directly 
applied to SOSCI pin.
F
CY
F
OSC
2
-------------
=