Microchip Technology MA330018 Data Sheet

© 2007-2012 Microchip Technology Inc.

DS70291G-page  327

The Parallel Master Port (PMP) module is a parallel 
8-bit I/O module, specifically designed to 
communicate with a wide variety of parallel devices, 
such as communication peripherals, LCDs, external 
memory devices and microcontrollers. Because the 
interface to parallel peripherals varies significantly, 
the PMP is highly configurable. 

Key features of the PMP module include:
• Fully Multiplexed Address/Data Mode

- 16 bits of address

• Demultiplexed or Partially Multiplexed Address/ 

Data mode:
- Up to 11 address lines with single Chip Select
- Up to 12 address lines without Chip Select

• One Chip Select Line
• Programmable Strobe Options:

- Individual Read and Write Strobes or;
- Read/Write Strobe with Enable Strobe

• Address Auto-Increment/Auto-Decrement
• Programmable Address/Data Multiplexing
• Programmable Polarity on Control Signals
• Legacy Parallel Slave Port Support
• Enhanced Parallel Slave Support:

- Address Support
- 4-Byte Deep Auto-Incrementing Buffer

• Programmable Wait States
• Selectable Input Voltage Levels

Note 1: This data sheet summarizes the features 

of the dsPIC33FJ32MC302/304, 
dsPIC33FJ64MCX02/X04 and 
dsPIC33FJ128MCX02/X04 family of 
devices. It is not intended to be a 
comprehensive reference source. To 
complement the information in this data 
sheet, refer to Section 35. “Parallel 
Master Port (PMP)” (DS70299) of the 
“dsPIC33F/PIC24H Family Reference 
Manual”, which is available from the 
Microchip web site 
(

www.microchip.com

).

2: Some registers and associated bits 

described in this section may not be 
available on all devices. Refer to 

 in 

this data sheet for device-specific register 
and bit information.

PMA<0>

PMBE

PMRD

PMWR

PMD<7:0>

PMENB

PMRD/PMWR

PMCS1

PMA<1>

PMA<10:2>

PMALL

PMALH

PMA<7:0>
PMA<10:8>

Address Bus
Data Bus
Control Lines

Up to 11-bit Address

Note 1: 28-pin devices do not have PMA<10:2>.

PMA<14>