Microchip Technology RF TXRX 433/868/915 TSSOP -16 MRF49XA-I/ST MRF49XA-I/ST Data Sheet
Product codes
MRF49XA-I/ST
© 2009-2011 Microchip Technology Inc.
Preliminary
DS70590C-page 57
MRF49XA
FIGURE 3-9:
FSK MODULATED DEVIATION – MAXIMUM TX TO RX OFFSET
The baseband filtering type can also be selected
between an analog filter and a digital filter.
between an analog filter and a digital filter.
3.10.1
ANALOG FILTERING MODE
For analog filtering, a simple RC low-pass filter is used,
along with a Schmitt Trigger circuit. The demodulator
output is fed to the RCLKOUT/FCAP/FINT pin over a
10 k
along with a Schmitt Trigger circuit. The demodulator
output is fed to the RCLKOUT/FCAP/FINT pin over a
10 k
Ω resistor. The filter cut-off frequency is set by the
external capacitor connected to this pin and V
SS
. A
10 k
Ω resistor and the Schmitt Trigger are integrated
on the chip. An external capacitor for the RC filter has
to be chosen in accordance with the required bit rate.
The receiver can handle up to 256 kbps of data rate in
analog operation. The receive data rate is
programmable from 337 bps to 256 kbps. An internal
prescaler can be used to give better resolution when
setting up the receive data rate. The prescaler is
optional and can be disabled through DRSREG. The
analog filtering does not use the FIFO and the clock.
The clock is not provided for the demodulated data,
and hence, there is no need for setting the correct bit
rate.
to be chosen in accordance with the required bit rate.
The receiver can handle up to 256 kbps of data rate in
analog operation. The receive data rate is
programmable from 337 bps to 256 kbps. An internal
prescaler can be used to give better resolution when
setting up the receive data rate. The prescaler is
optional and can be disabled through DRSREG. The
analog filtering does not use the FIFO and the clock.
The clock is not provided for the demodulated data,
and hence, there is no need for setting the correct bit
rate.
3.10.2
DIGITAL FILTERING MODE
A digital filter is used with a clock frequency at 29 times
the data rate. For digital filtering, the synchronized
clock to the data is provided by the CLKRC. By using
this clock, the received data can fill the FIFO. If the
FIFO is not used, the recovered clock can be accessed
through RCLKOUT/FCAP/ FINT pin.
The CLKRC operates in three modes: Automatic mode,
Slow mode and Fast mode. All three modes are
configurable through BBFCREG. Each mode is
dependent on the type of signals it uses to determine
the valid data and also the number of incoming
preamble bits present at the beginning of the packet. In
Automatic mode, the CR CLKRC automatically
switches between the Fast and Slow mode. The noise
immunity of the CLKRC is very high in Slow mode;
however, it has slower settling time and requires more
accurate data timing than in Fast mode.
The registers associated with baseband filtering are:
• STSREG (see
the data rate. For digital filtering, the synchronized
clock to the data is provided by the CLKRC. By using
this clock, the received data can fill the FIFO. If the
FIFO is not used, the recovered clock can be accessed
through RCLKOUT/FCAP/ FINT pin.
The CLKRC operates in three modes: Automatic mode,
Slow mode and Fast mode. All three modes are
configurable through BBFCREG. Each mode is
dependent on the type of signals it uses to determine
the valid data and also the number of incoming
preamble bits present at the beginning of the packet. In
Automatic mode, the CR CLKRC automatically
switches between the Fast and Slow mode. The noise
immunity of the CLKRC is very high in Slow mode;
however, it has slower settling time and requires more
accurate data timing than in Fast mode.
The registers associated with baseband filtering are:
• STSREG (see
)
• BBFCREG (see
)
• PMCREG (see
10 kHz
BBBW
Programmable
RX Center
Freq.
Baseband Filter Characteristic
2 x deviation
Amplitude
10 kHz + Data Rate
Data Rate
TX-RX Offset
TX Center
Freq.
Frequency