Microchip Technology MA240017 Data Sheet

PIC24F16KA102 FAMILY

DS3

9927C-page 36



2008-20

11 M

rochip

chnology

TABLE 4-9:

C™ REGISTER MAP

File Name

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

I2C1RCV

0200

—

I2C1 Receive Register

0000

I2C1TRN

0202

—

I2C1 Transmit Register

00FF

I2C1BRG

0204

—

I2C1 Baud Rate Generator Register

0000

I2C1CON

0206

I2CEN

—

I2CSIDL SCLREL IPMIEN

A10M

DISSLW

SMEN

GCEN

STREN

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

1000

I2C1STAT

0208

ACKSTAT TRSTAT

—

BCL

GCSTAT

ADD10

IWCOL

I2COV

D/A

R/W

RBF

TBF

0000

I2C1ADD

020A

—

I2C1 Address Register

0000

I2C1MSK

020C

—

AMSK9

AMSK8

AMSK7

AMSK6

AMSK5

AMSK4

AMSK3

AMSK2

AMSK1

AMSK0

0000

Legend:

— = unimplemented, read as ‘0’. Reset values are shown in h.5adecimal.

TABLE 4-10:

UART REGISTER MAP

File

Name

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

U1MODE

0220

UARTEN

—

USIDL

IREN

RTSMD

—

UEN1

UEN0

WAKE

LPBACK

ABAUD

RXINV

BRGH

PDSEL1 PDSEL0 STSEL

0000

U1STA

0222

UTXISEL1 UTXINV UTXISEL0

—

UTXBRK

UTXEN

UTXBF

TRMT

URXISEL1

URXISEL0

ADDEN

RIDLE

PERR

FERR

OERR

URXDA

0110

U1TXREG

0224

—

UART1 Transmit Register

0000

U1RXREG

0226

—

UART1 Receive Register

0000

U1BRG

0228

Baud Rate Generator Prescaler Register

0000

U2MODE

0230

UARTEN

—

USIDL

IREN

RTSMD

—

UEN1

UEN0

WAKE

LPBACK

ABAUD

RXINV

BRGH

PDSEL1 PDSEL0 STSEL

0000

U2STA

0232

UTXISEL1 UTXINV UTXISEL0

—

UTXBRK

UTXEN

UTXBF

TRMT

URXISEL1

URXISEL0

ADDEN

RIDLE

PERR

FERR

OERR

URXDA

0110

U2TXREG

0234

—

UART2 Transmit Register

0000

U2RXREG

0236

—

UART2 Receive Register

0000

U2BRG

0238

Baud Rate Generator Prescaler

0000

Legend:

— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-11:

SPI REGISTER MAP

File

Name

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

SPI1STAT

0240

SPIEN

—

SPISIDL

—

SPIBEC2 SPIBEC1 SPIBEC0

SRMPT

SPIROV SRXMPT

SISEL2

SISEL1

SISEL0

SPITBF

SPIRBF

0000

SPI1CON1

0242

—

DISSCK

DISSDO

MODE16

SMP

CKE

SSEN

CKP

MSTEN

SPRE2

SPRE1

SPRE0

PPRE1

PPRE0

0000

SPI1CON2

0244

FRMEN

SPIFSD

SPIFPOL

—

SPIFE

SPIBEN

0000

SPI1BUF

0248

SPI1 Transmit/Receive Buffer

0000

Legend:

— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.