Microchip Technology MA240017 Data Sheet
2008-2
011 M
ic
rochip
T
e
chnology
In
c.
DS39927C
-page 37
PIC24F16KA102 FAMILY
TABLE 4-12:
PORTA REGISTER MAP
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
)
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
TRISA
02C0
—
—
—
—
—
—
—
—
TRISA7
)
TRISA6
—
TRISA4
TRISA3
TRISA2
)
TRISA1
TRISA0
00DF
PORTA
02C2
—
—
—
—
—
—
—
—
RA7
(
RA6
RA5
RA4
RA3
,
)
RA2
RA1
(
RA0
)
xxxx
LATA
02C4
—
—
—
—
—
—
—
—
LATA7
LATA6
—
LATA4
LATA3
(
LATA2
)
LATA1
LATA0
xxxx
ODCA
02C6
—
—
—
—
—
—
—
—
ODA7
ODA6
—
ODA4
ODA3
(
ODA2
)
ODA1
ODA0
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
This bit is available only when MCLRE = 0.
2:
A read of RA1 and RA0 results in ‘0’ when debug is active on the PGC2/PGD2 pin.
3:
A read of RA4 results in ‘0’ when debug is active on the PGC3/PGD3 pin.
4:
These bits are not implemented in 20-pin devices.
5:
These bits are available only when the primary oscillator is disabled (POSCMD<1:0> = 00); otherwise read as ‘0’.
6:
These bits are available only when the primary oscillator is disabled or EC mode is selected (POSCMD<1:0> = 00 or 11) and CLKO is disabled (OSCIOFNC = 0); otherwise read as ‘0’.
TABLE 4-13:
PORTB REGISTER MAP
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
TRISB
02C8
TRISB15
TRISB14
TRISB13
TRISB12
TRISB11
)
TRISB10
)
TRISB9
TRISB8
TRISB7 TRISB6
TRISB5
TRISB4
TRISB3
)
TRISB2
TRISB1
TRISB0
FFFF
PORTB 02CA
RB15
RB14
RB13
RB12
RB11
RB10
RB9
RB8
RB7
RB6
(
RB5
(
)
RB4
)
RB3
RB2
RB1
)
RB0
(
xxxx
LATB
02CC
LATB15
LATB14
LATB13
LATB12
LATB11
)
LATB10
(
LATB9
LATB8
LATB7
LATB6
)
LATB5
LATB4
LATB3
)
LATB2
LATB1
LATB0
xxxx
ODCB
02CE
ODB15
ODB14
ODB13
ODB12
ODB11
ODB10
ODB9
ODB8
ODB7
ODB6
ODB5
ODB4
ODB3
ODB2
ODB1
ODB0
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
A read of RB1 and RB0 results in ‘0’ when debug is active on the PGEC1/PGED1 pins.
2:
A read of RB4 results in ‘0’ when debug is active on the PGEC3/PGED3 pins.
3:
PORTB bits, 11, 10, 6, 5 and 3, are not implemented in 20-pin devices.
TABLE 4-14:
PAD CONFIGURATION REGISTER MAP
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All Resets
PADCFG1
02FC
—
—
—
—
—
—
—
—
—
—
—
SMBUSDEL OC1TRIS RTSECSEL1 RTSECSEL0
—
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.