Microchip Technology MA240017 Data Sheet
PIC24F16KA102 FAMILY
DS39927C-page 48
2008-2011 Microchip Technology Inc.
5.5.1
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
FLASH PROGRAM MEMORY
The user can program one row of Flash program
memory at a time by erasing the programmable row.
The general process is:
1.
memory at a time by erasing the programmable row.
The general process is:
1.
Read a row of program memory
(32 instructions) and store in data RAM.
(32 instructions) and store in data RAM.
2.
Update the program data in RAM with the
desired new data.
desired new data.
3.
Erase a row (see
a)
Set the NVMOP bits (NVMCON<5:0>) to
‘011000’ to configure for row erase. Set the
ERASE (NVMCON<6>) and WREN
(NVMCON<14>) bits.
‘011000’ to configure for row erase. Set the
ERASE (NVMCON<6>) and WREN
(NVMCON<14>) bits.
b)
Write the starting address of the block to be
erased into the TBLPAG and W registers.
erased into the TBLPAG and W registers.
c)
Write 55h to NVMKEY.
d)
Write AAh to NVMKEY.
e)
Set the WR bit (NVMCON<15>). The erase
cycle begins and the CPU stalls for the
duration of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
cycle begins and the CPU stalls for the
duration of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
4.
).
5.
Write the program block to Flash memory:
a) Set the NVMOP bits to ‘000100’ to
a) Set the NVMOP bits to ‘000100’ to
configure for row programming. Clear the
ERASE bit and set the WREN bit.
ERASE bit and set the WREN bit.
b) Write 55h to NVMKEY.
c)
c)
Write AAh to NVMKEY.
d) Set the WR bit. The programming cycle
begins and the CPU stalls for the duration
of the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
of the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
must wait for the programming time until programming
is complete. The two instructions following the start of
the programming sequence should be NOPs, as
displayed in
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
must wait for the programming time until programming
is complete. The two instructions following the start of
the programming sequence should be NOPs, as
displayed in
EXAMPLE 5-1:
ERASING A PROGRAM MEMORY ROW – ASSEMBLY LANGUAGE CODE
EXAMPLE 5-2:
ERASING A PROGRAM MEMORY ROW – ‘C’ LANGUAGE CODE
; Set up NVMCON for row erase operation
MOV
#0x4058, W0
;
MOV
W0, NVMCON
; Initialize NVMCON
; Init pointer to row to be ERASED
MOV
#tblpage(PROG_ADDR), W0
;
MOV
W0, TBLPAG
; Initialize PM Page Boundary SFR
MOV
#tbloffset(PROG_ADDR), W0
; Initialize in-page EA[15:0] pointer
TBLWTL
W0, [W0]
; Set base address of erase block
DISI
#5
; Block all interrupts
for next 5 instructions
MOV
#0x55, W0
MOV
W0, NVMKEY
; Write the 55 key
MOV
#0xAA, W1
;
MOV
W1, NVMKEY
; Write the AA key
BSET
NVMCON, #WR
; Start the erase sequence
NOP
; Insert two NOPs after the erase
NOP
; command is asserted
// C example using MPLAB C30
int __attribute__ ((space(auto_psv))) progAddr = 0x1234;
// Variable located in Pgm Memory, declared as a
// global variable
unsigned int offset;
//Set up pointer to the first memory location to be written
TBLPAG = __builtin_tblpage(&progAddr);
// Initialize PM Page Boundary SFR
offset = __builtin_tbloffset(&progAddr);
// Initialize lower word of address
__builtin_tblwtl(offset, 0x0000);
// Set base address of erase block
// with dummy latch write
NVMCON = 0x4058;
// Initialize NVMCON
asm("DISI #5");
// Block all interrupts for next 5 instructions
__builtin_write_NVM();
// C30 function to perform unlock
// sequence and set WR