Microchip Technology MA320002 Data Sheet
© 2011 Microchip Technology Inc.
DS61143H-page 111
PIC32MX3XX/4XX
17.0
SERIAL PERIPHERAL
INTERFACE (SPI)
INTERFACE (SPI)
The SPI module is a synchronous serial interface use-
ful for communicating with external peripherals and
other microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, Analog-to-Digital Converters, etc. The
PIC32MX SPI module is compatible with Motorola
ful for communicating with external peripherals and
other microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, Analog-to-Digital Converters, etc. The
PIC32MX SPI module is compatible with Motorola
®
SPI
and SIOP interfaces.
Following are some of the key features of this module:
• Master and Slave Modes Support
• Four Different Clock Formats
• Framed SPI Protocol Support
• User Configurable 8-bit, 16-bit and 32-bit Data
Width
• Separate SPI Data Registers for Receive and
Transmit
• Programmable Interrupt Event on every 8-bit,
16-bit and 32-bit Data Transfer
• Operation during CPU Sleep and Idle Mode
• Fast Bit Manipulation using CLR, SET and INV
Registers
FIGURE 17-1:
SPI MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 23. “Serial Peripheral
Interface (SPI)” (DS61106) of the
“PIC32 Family Reference Manual”, which
is available from the Microchip web site
(
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 23. “Serial Peripheral
Interface (SPI)” (DS61106) of the
“PIC32 Family Reference Manual”, which
is available from the Microchip web site
(
www.microchip.com/PIC32
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
Internal
Data Bus
SDIx
SDOx
SSx/F
SYNC
SCKx
SPIxSR
bit 0
Shift
Control
Edge
Select
Enable Master Clock
Baud Rate
Slave Select
Sync Control
Clock
Control
Transmit
SPIxRXB
Receive
and Frame
Note: Access SPIxTXB and SPIxRXB registers via SPIxBUF register.
Registers share address SPIxBUF
SPIxTXB
SPIxBUF
Generator
PBCLK
Write
Read