Microchip Technology MA320002 Data Sheet
© 2011 Microchip Technology Inc.
DS61143H-page 109
PIC32MX3XX/4XX
16.0
OUTPUT COMPARE
The Output Compare module (OCMP) is used to gen-
erate a single pulse or a train of pulses in response to
selected time base events. For all modes of operation,
the OCMP module compares the values stored in the
OCxR and/or the OCxRS registers to the value in the
selected timer. When a match occurs, the OCMP mod-
ule generates an event based on the selected mode of
operation.
erate a single pulse or a train of pulses in response to
selected time base events. For all modes of operation,
the OCMP module compares the values stored in the
OCxR and/or the OCxRS registers to the value in the
selected timer. When a match occurs, the OCMP mod-
ule generates an event based on the selected mode of
operation.
The following are some of the key features:
• Multiple output compare modules in a device
• Programmable interrupt generation on compare
event
• Single and Dual Compare modes
• Single and continuous output pulse generation
• Pulse-Width Modulation (PWM) mode
• Hardware-based PWM Fault detection and
automatic output disable
• Programmable selection of 16-bit or 32-bit time
bases.
• Can operate from either of two available 16-bit
time bases or a single 32-bit time base
FIGURE 16-1:
OUTPUT COMPARE MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 16. “Output
Compare” (DS61111) of the “PIC32
Family Reference Manual”, which is
available from the Microchip web site
(
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 16. “Output
Compare” (DS61111) of the “PIC32
Family Reference Manual”, which is
available from the Microchip web site
(
www.microchip.com/PIC32
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
OCxR
(1)
Comparator
Output
Logic
Q
S
R
OCM<2:0>
Output Enable
OCx
(1)
Set Flag bit
OCxIF
(1)
OCxRS
(1)
Mode Select
3
Note 1: Where ‘x’ is shown, reference is made to the registers associated with the respective output compare
channels 1 through 5.
2: The OCFA pin controls the OC1-OC4 channels. The OCFB pin controls the OC5 channel.
3: Each output compare channel can use one of two selectable 16-bit time bases or a single 32-bit timer base.
3: Each output compare channel can use one of two selectable 16-bit time bases or a single 32-bit timer base.
0
1
OCTSEL
0
1
16
16
OCFA or OCFB
(see Note 2)
(see Note 2)
TMR register inputs
from time bases
(see Note 3)
from time bases
(see Note 3)
Period match signals
from time bases
(see Note 3)
from time bases
(see Note 3)
Logic
Output
Enable