Microchip Technology MA320002 Data Sheet

PIC32MX3XX/4XX

DS61143H

-page 66

2011 Microchip T

chnolo

y Inc.

3160

DCH1DSA

31:16

CHDSA<31:0>

0000

15:0

0000

3170

DCH1SSIZ

31:16

—

0000

15:0

—

CHSSIZ<7:0>

0000

3180 DCH1DSIZ

31:16

—

0000

15:0

—

CHDSIZ<7:0>

0000

3190 DCH1SPTR

31:16

—

0000

15:0

—

CHSPTR<7:0>

0000

31A0 DCH1DPTR

31:16

—

0000

15:0

—

CHDPTR<7:0>

0000

31B0 DCH1CSIZ

31:16

—

0000

15:0

—

CHCSIZ<7:0>

0000

31C0 DCH1CPTR

31:16

—

0000

15:0

—

CHCPTR<7:0>

0000

31D0

DCH1DAT

31:16

—

0000

15:0

—

CHPDAT<7:0>

0000

31E0 DCH2CON

31:16

—

0000

15:0

—

CHCHNS

CHEN

CHAED

CHCHN

CHAEN

—

CHEDET

CHPRI<1:0>

0000

31F0 DCH2ECON

31:16

—

CHAIRQ<7:0>

00FF

15:0

CHSIRQ<7:0>

CFORCE

CABORT

PATEN

SIRQEN

AIRQEN

—

FF00

3200

DCH2INT

31:16

—

CHSDIE

CHSHIE

CHDDIE

CHDHIE

CHBCIE

CHCCIE

CHTAIE

CHERIE

0000

15:0

—

CHSDIF

CHSHIF

CHDDIF

CHDHIF

CHBCIF

CHCCIF

CHTAIF

CHERIF

0000

3210

DCH2SSA

31:16

CHSSA<31:0>

0000

15:0

0000

3220

DCH2DSA

31:16

CHDSA<31:0>

0000

15:0

0000

3230

DCH2SSIZ

31:16

—

0000

15:0

—

CHSSIZ<7:0>

0000

3240 DCH2DSIZ

31:16

—

0000

15:0

—

CHDSIZ<7:0>

0000

3250 DCH2SPTR

31:16

—

0000

15:0

—

CHSPTR<7:0>

0000

TABLE 4-16:

DMA CHANNELS 0-3 REGISTERS MAP FOR PIC32MX340FXXXX/360FXXXX/440FXXXX/460XXXX
DEVICES ONLY

(1)

(CONTINUED)

irtual Addr

8_#)

gist

Name

Bit Rang

Bits

All Re

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note

All registers except DCHxSPTR, DCHxDPTR and DCHxCPTR have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See

Section 12.1.1 “CLR,

SET and INV Registers”

for more information.