Microchip Technology MA330017 Data Sheet

DS70283K-page 315

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

Revision E (June 2009)

This revision includes minor typographical and
formatting changes throughout the data sheet text.
Global changes include:
• Changed all instances of OSCI to OSC1 and

OSCO to OSC2

• Changed all instances of PGCx/EMUCx and

PGDx/EMUDx (where x = 1, 2 or 3) to PGECx
and PGEDx

Changed all instances of V

DDCORE

and V

DDCORE

CAP

to V

CAP

DDCORE

All other major changes are referenced by their
respective section in the following table.

TABLE A-3:

MAJOR SECTION UPDATES

Section Name

Update Description

“High-Performance, 16-bit Digital Signal
Controllers”

Added Note 2 to the 28-Pin QFN-S and 44-Pin QFN pin
diagrams, which references pin connections to V

Section 7.0 “Interrupt Controller”

Updated addresses for interrupt vectors 80, 81, 82 and 83-125
(see Table 7-1).

Section 8.0 “Oscillator Configuration”

Updated the Oscillator System Diagram (see Figure 8-1).

Added Note 1 to the Oscillator Tuning register (OSCTUN) (see
Register 8-4).

Section 10.0 “I/O Ports”

Removed Table 10-1 and added reference to pin diagrams for I/O
pin availability and functionality.

Section 17.0 “Serial Peripheral Interface (SPI)” Added Note 2 to the SPIx Control Register 1 (see Register 17-2).
Section 19.0 “Universal Asynchronous
Receiver Transmitter (UART)”

Updated the UTXINV bit settings in the UxSTA register and
added Note 1 (see Register 19-2).

Section 24.0 “Electrical Characteristics”

Updated the Min value for parameter DC12 (RAM Retention
Voltage) and added Note 4 to the DC Temperature and Voltage
Specifications (see Table 24-4).

Updated the Min value for parameter DI35 (see Table 24-20).

Updated AD08 and added reference to Note 2 for parameters
AD05a, AD06a and AD08a (see Table 24-38).