Microchip Technology MA330031-2 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 151
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 8-14:
DMAPPS: DMA PING-PONG STATUS REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
U-0
R-0
R-0
R-0
R-0
—
—
—
—
PPST3
PPST2
PPST1
PPST0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-4
Unimplemented:
Read as ‘0’
bit 3
PPST3:
DMA Channel 3 Ping-Pong Mode Status Flag bit
1
= DMASTB3 register is selected
0
= DMASTA3 register is selected
bit 2
PPST2:
DMA Channel 2 Ping-Pong Mode Status Flag bit
1
= DMASTB2 register is selected
0
= DMASTA2 register is selected
bit 1
PPST1:
DMA Channel 1 Ping-Pong Mode Status Flag bit
1
= DMASTB1 register is selected
0
= DMASTA1 register is selected
bit 0
PPST0:
DMA Channel 0 Ping-Pong Mode Status Flag bit
1
= DMASTB0 register is selected
0
= DMASTA0 register is selected