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Microchip Technology MA330031-2 Data Sheet

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 2011-2013 Microchip Technology Inc.
DS70000657H-page 243
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 16-15: FCLCONx: PWMx FAULT CURRENT-LIMIT CONTROL REGISTER
(
)
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
CLSRC4
CLSRC3
CLSRC2
CLSRC1
CLSRC0
CLPOL
CLMOD
bit 15
bit 8
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-0
R/W-0
R/W-0
FLTSRC4
FLTSRC3
FLTSRC2
FLTSRC1
FLTSRC0
FLTPOL
FLTMOD1
FLTMOD0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented:
 Read as ‘0’
bit 14-10
CLSRC<4:0>: 
Current-Limit Control Signal Source Select for PWM Generator # bits
11111
 = Fault 32
11110
 = Reserved
•
•
•
01100
 = Reserved
01011
 = Comparator 4
01010
 = Op Amp/Comparator 3
01001
 = Op Amp/Comparator 2
01000
 = Op Amp/Comparator 1
00111
 = Reserved
00110
 = Reserved
00101
 = Reserved
00100
 = Reserved
00011
 = Fault 4
00010
 = Fault 3
00001
 = Fault 2
00000
 = Fault 1 (default)
bit 9
CLPOL:
 Current-Limit Polarity for PWM Generator # bit
(
)
1
 = The selected current-limit source is active-low
0
 = The selected current-limit source is active-high
bit 8
CLMOD:
 Current-Limit Mode Enable for PWM Generator # bit
1
 = Current-Limit mode is enabled
0
 = Current-Limit mode is disabled
Note 1:
If the PWMLOCK Configuration bit (FOSCSEL<6>) is a ‘1’, the IOCONx register can only be written after 
the unlock sequence has been executed.
2:
These bits should be changed only when PTEN = 0. Changing the clock selection during operation will 
yield unpredictable results.