Microchip Technology MA330031-2 Data Sheet

Page of 530
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 244
 2011-2013 Microchip Technology Inc.
bit 7-3
FLTSRC<4:0>:
 Fault Control Signal Source Select for PWM Generator # bits
11111
 = Fault 32 (default)
11110
 = Reserved


01100
 = Reserved
01011
 = Comparator 4
01010
 = Op Amp/Comparator 3
01001
 = Op Amp/Comparator 2
01000
 = Op Amp/Comparator 1
00111
 = Reserved
00110
 = Reserved
00101
 = Reserved
00100
 = Reserved
00011
 = Fault 4
00010
 = Fault 3
00001
 = Fault 2
00000
 = Fault 1
bit 2
FLTPOL:
 Fault Polarity for PWM Generator # bit
(
1
 = The selected Fault source is active-low
0
 = The selected Fault source is active-high
bit 1-0
FLTMOD<1:0>:
 Fault Mode for PWM Generator # bits
11
 = Fault input is disabled
10
 = Reserved
01
 = The selected Fault source forces PWMxH, PWMxL pins to FLTDAT values (cycle)
00
 = The selected Fault source forces PWMxH, PWMxL pins to FLTDAT values (latched condition)
REGISTER 16-15: FCLCONx: PWMx FAULT CURRENT-LIMIT CONTROL REGISTER
(
1
)
 
Note 1:
If the PWMLOCK Configuration bit (FOSCSEL<6>) is a ‘1’, the IOCONx register can only be written after 
the unlock sequence has been executed.
2:
These bits should be changed only when PTEN = 0. Changing the clock selection during operation will 
yield unpredictable results.