Microchip Technology MA330031-2 Data Sheet
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 330
2011-2013 Microchip Technology Inc.
REGISTER 23-4:
AD1CON4: ADC1 CONTROL REGISTER 4
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
—
—
ADDMAEN
bit 15
bit 8
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
—
—
—
—
—
DMABL2
DMABL1
DMABL0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-9
Unimplemented:
Read as ‘0’
bit 8
ADDMAEN:
ADC1 DMA Enable bit
1
= Conversion results are stored in the ADC1BUF0 register for transfer to RAM using DMA
0
= Conversion results are stored in ADC1BUF0 through ADC1BUFF registers; DMA will not be used
bit 7-3
Unimplemented:
Read as ‘0’
bit 2-0
DMABL<2:0>:
Selects Number of DMA Buffer Locations per Analog Input bits
111
= Allocates 128 words of buffer to each analog input
110
= Allocates 64 words of buffer to each analog input
101
= Allocates 32 words of buffer to each analog input
100
= Allocates 16 words of buffer to each analog input
011
= Allocates 8 words of buffer to each analog input
010
= Allocates 4 words of buffer to each analog input
001
= Allocates 2 words of buffer to each analog input
000
= Allocates 1 word of buffer to each analog input