Microchip Technology TDGL003 - chipKIT Max32 Development Board TDGL003 TDGL003 Data Sheet

Product codes
TDGL003
Page of 214
PIC32MX3XX/4XX
DS61143H
-page 82
©
 2011 Microchip T
e
chnolo
g
y Inc.
 
TABLE 4-43:
USB REGISTERS MAP
(1)
V
irtual Address
(BF88_#
)
Regis
ter
Na
m
e
Bit Range
Bits
All
 R
e
set
s
31/15
30/14
29/13
28/12
27/11
26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
5040
U1OTG
IR
(2)
31:16
15:0
IDIF
T1MSECIF
LSTATEIF
ACTVIF
SESVDIF SESENDIF
VBUSVDIF 0000
5050
U1OTG
IE
31:16
0000
15:0
IDIE
T1MSECIE
LSTATEIE
ACTVIE
SESVDIE SESENDIE
VBUSVDIE 0000
5060
U1OTG
STAT
(3)
31:16
0000
15:0
ID
LSTATE
SESVD
SESEND
VBUSVD
0000
5070
U1OTG
CON
31:16
0000
15:0
DPPULUP DMPULUP DPPULDWN DMPULDWN VBUSON
OTGEN
VBUSCHG
VBUSDIS 0000
5080
U1PWRC
31:16
0000
15:0
UACTPND
(4)
USLPGRD
USUSPEND USBPWR 0000
5200
U1IR
(2)
31:16
0000
15:0
STALLIF
ATTACHIF RESUMEIF
IDLEIF
TRNIF
SOFIF
UERRIF
URSTIF
0000
DETACHIF 0000
5210
U1IE
31:16
0000
15:0
STALLIE
ATTACHIE RESUMEIE
IDLEIE
TRNIE
SOFIE
UERRIE
URSTIE
0000
DETACHIE 0000
5220
U1EIR
31:16
0000
15:0
BTSEF
BMXEF
DMAEF
BTOEF
DFN8EF
CRC16EF
CRC5EF
PIDEF
0000
EOFEF
0000
5230
U1EIE
31:16
0000
15:0
BTSEE
BMXEE
DMAEE
BTOEE
DFN8EE
CRC16EE
CRC5EE
PIDEE
0000
EOFEE
0000
5240 U1STAT
(3)
31:16
0000
15:0
ENDPT<3:0>
(4)
DIR
PPBI
0000
5250
U1CON
31:16
0000
15:0
JSTATE
(4)
SE0
(4)
PKTDIS
USBRST
HOSTEN
RESUME
PPBRST
USBEN
0000
TOKBUSY
SOFEN
0000
5260
U1ADDR
31:16
0000
15:0
LSPDEN
DEVADDR<6:0>
0000
5270
U1BDTP1
31:16
0000
15:0
BDTPTRL<7:1>
0000
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note
1:
Except where noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See 
2:
This register does not have associated CLR, SET, and INV registers.
3:
All bits in this register are read-only; therefore, CLR, SET, and INV registers are not supported.
4:
The reset value for this bit is undefined.