Microchip Technology GPIODM-KPLCD Data Sheet
© 2009 Microchip Technology Inc.
DS39632E-page 157
PIC18F2455/2550/4455/4550
16.4.5
FULL-BRIDGE MODE
In Full-Bridge Output mode, four pins are used as
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 16-6.
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 16-6.
P1A, P1B, P1C and P1D outputs are multiplexed with
the PORTC<2>, PORTD<5>, PORTD<6> and
PORTD<7> data latches. The TRISC<2>, TRISD<5>,
TRISD<6> and TRISD<7> bits must be cleared to
make the P1A, P1B, P1C and P1D pins outputs.
the PORTC<2>, PORTD<5>, PORTD<6> and
PORTD<7> data latches. The TRISC<2>, TRISD<5>,
TRISD<6> and TRISD<7> bits must be cleared to
make the P1A, P1B, P1C and P1D pins outputs.
FIGURE 16-6:
FULL-BRIDGE PWM OUTPUT
Period
Duty Cycle
P1A
(2)
P1B
(2)
P1C
(2)
P1D
(2)
Forward Mode
(1)
Period
Duty Cycle
P1A
(2)
P1C
(2)
P1D
(2)
P1B
(2)
Reverse Mode
(1)
(1)
(1)
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note
2: Output signal is shown as active-high.