Microchip Technology MA330026 Data Sheet
2011-2014 Microchip Technology Inc.
DS70000652F-page 109
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
REGISTER 7-11:
IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
U-0
U-0
R/W-0
R/W-0
R/W-0
U-0
U-0
U-0
—
—
INT2IE
T5IE
(
T4IE
(
—
—
—
bit 15
bit 8
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
INT1IE
CNIE
CMIE
MI2C1IE
SI2C1IE
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
Unimplemented: Read as ‘0’
bit 13
INT2IE: External Interrupt 2 Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 12
T5IE: Timer5 Interrupt Enable bit
1
= Interrupt request has occurred
0
= Interrupt request has not occurred
bit 11
T4IE: Timer4 Interrupt Enable bit
1
= Interrupt request has occurred
0
= Interrupt request has not occurred
bit 10-5
Unimplemented: Read as ‘0’
bit 4
INT1IE: External Interrupt 1 Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 3
CNIE: Input Change Notification Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 2
CMIE: Comparator Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 1
MI2C1IE: I2C1 Master Events Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 0
SI2C1IE: I2C1 Slave Events Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
Note 1:
These bits are available in dsPIC33FJ32(GP/MC)10X devices only.