Microchip Technology MA330026 Data Sheet
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
DS70000652F-page 88
2011-2014 Microchip Technology Inc.
6.1
Reset Control Register
REGISTER 6-1:
RCON: RESET CONTROL REGISTER
)
R/W-0
R/W-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
TRAPR
IOPUWR
—
—
—
—
CM
VREGS
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-1
R/W-1
EXTR
SWR
SWDTEN
WDTO
SLEEP
IDLE
BOR
POR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
TRAPR: Trap Reset Flag bit
1
= A Trap Conflict Reset has occurred
0
= A Trap Conflict Reset has not occurred
bit 14
IOPUWR: Illegal Opcode or Uninitialized W Access Reset Flag bit
1
= An illegal opcode detection, an illegal address mode or Uninitialized W register used as an
Address Pointer caused a Reset
0
= An Illegal Opcode or Uninitialized W Reset has not occurred
bit 13-10
Unimplemented: Read as ‘0’
bit 9
CM: Configuration Mismatch Flag bit
1
= A Configuration Mismatch Reset has occurred
0
= A Configuration Mismatch Reset has not occurred
bit 8
VREGS: Voltage Regulator Stand-by During Sleep bit
1
= Voltage regulator is active during Sleep
0
= Voltage regulator goes into Stand-by mode during Sleep
bit 7
EXTR: External Reset (MCLR) Pin bit
1
= A Master Clear (pin) Reset has occurred
0
= A Master Clear (pin) Reset has not occurred
bit 6
SWR: Software Reset (Instruction) Flag bit
1
= A RESET instruction has been executed
0
= A RESET instruction has not been executed
bit 5
SWDTEN: Software Enable/Disable of WDT bit
1
= WDT is enabled
0
= WDT is disabled
bit 4
WDTO: Watchdog Timer Time-out Flag bit
1
= WDT time-out has occurred
0
= WDT time-out has not occurred
bit 3
SLEEP: Wake-up from Sleep Flag bit
1
= Device has been in Sleep mode
0
= Device has not been in Sleep mode
Note 1:
All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
cause a device Reset.
2:
If the FWDTEN Configuration bit is set to ‘1’ (unprogrammed), the WDT is always enabled, regardless of
the SWDTEN bit setting.
the SWDTEN bit setting.