Microchip Technology AC164139 Data Sheet

 2010 Microchip Technology Inc.

DS39969B-page 289

PIC24FJ256DA210 FAMILY

REGISTER 20-3:

ALCFGRPT: ALARM CONFIGURATION REGISTER

R/W-0

R/W-0, HSC R/W-0, HSC

ALRMEN

CHIME

AMASK3

AMASK2

AMASK1

AMASK0

ALRMPTR1

ALRMPTR0

bit 15

bit 8

R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC

ARPT7

ARPT6

ARPT5

ARPT4

ARPT3

ARPT2

ARPT1

ARPT0

bit 7

bit 0

Legend:

HSC = Hardware Settable/Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

ALRMEN: Alarm Enable bit

= Alarm is enabled (cleared automatically after an alarm event whenever ARPT<7:0> = 00h and

CHIME = 0)

= Alarm is disabled

bit 14

CHIME: Chime Enable bit

= Chime is enabled; ARPT<7:0> bits are allowed to roll over from 00h to FFh

= Chime is disabled; ARPT<7:0> bits stop once they reach 00h

bit 13-10

AMASK<3:0>: Alarm Mask Configuration bits

11xx

= Reserved – do not use

101x

= Reserved – do not use

1001

= Once a year (except when configured for February 29

, once every 4 years)

1000

= Once a month

0111

= Once a week

0110

= Once a day

0101

= Every hour

0100

= Every 10 minutes

0011

= Every minute

0010

= Every 10 seconds

0001

= Every second

0000

= Every half second

bit 9-8

ALRMPTR<1:0>: Alarm Value Register Window Pointer bits
Points to the corresponding Alarm Value registers when reading the ALRMVALH and ALRMVALL registers.
The ALRMPTR<1:0> value decrements on every read or write of ALRMVALH until it reaches ‘00’.
ALRMVAL<15:8>:
11

= Unimplemented

= ALRMMNTH

= ALRMWD

= ALRMMIN

ALRMVAL<7:0>:
11

= Unimplemented

= ALRMDAY

= ALRMHR

= ALRMSEC

bit 7-0

ARPT<7:0>: Alarm Repeat Counter Value bits

11111111

= Alarm will repeat 255 more times

...
00000000

= Alarm will not repeat

The counter decrements on any alarm event. The counter is prevented from rolling over from 00h to FFh
unless CHIME = 1.