Microchip Technology AC164139 Data Sheet
2010 Microchip Technology Inc.
DS39969B-page 319
PIC24FJ256DA210 FAMILY
REGISTER 22-25: G1CLUT: COLOR LOOK-UP TABLE CONTROL REGISTER
R/W-0
R-0, HSC
U-0
U-0
U-0
U-0
R/W-0
R/W-0
CLUTEN
CLUTBUSY
—
—
—
—
CLUTTRD
CLUTRWEN
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CLUTADR7
CLUTADR6
CLUTADR5 CLUTADR4 CLUTADR3 CLUTADR2 CLUTADR1
CLUTADR0
bit 7
bit 0
Legend:
HSC = Hardware Settable/Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
CLUTEN: Color Look-up Table Enable Control bit
1
= Color look-up table is enabled
0
= Color look-up table is disabled
bit 14
CLUTBUSY: Color Look-up Table Busy Status bit
1
= A CLUT entry read/write access is being executed
0
= No CLUT entry read/write access is being executed
bit 13-10
Unimplemented: Read as ‘0’
bit 9
CLUTTRD: Color Look-up Table Read Trigger bit
Enabling this bit will trigger a read to the CLUT location determined by the CLUTADR bits
(G1CLUT<7:0>) with CLUTRWEN enabled.
1
Enabling this bit will trigger a read to the CLUT location determined by the CLUTADR bits
(G1CLUT<7:0>) with CLUTRWEN enabled.
1
= CLUT read trigger is enabled (must be cleared in software after reading data in the G1CLUTRD
register)
0
= CLUT read trigger is disabled
bit 8
CLUTRWEN: Color Look-up Table Read/Write Enable Control bit
This bit must be set when reading or modifying entries on the CLUT and it must also be cleared when
CLUT is used by the display controller.
1
This bit must be set when reading or modifying entries on the CLUT and it must also be cleared when
CLUT is used by the display controller.
1
= Color look-up table read/write enabled; display controller cannot access the CLUT
0
= Color look-up table read/write disabled; display controller can access the CLUT
bit 7-0
CLUTADR<7:0>: Color Look-up Table Memory Address bits