Microchip Technology AC164139 Data Sheet
PIC24FJ256DA210 FAMILY
DS39969B-page 344
2010 Microchip Technology Inc.
26.2
Measuring Time
Time measurements on the pulse width can be similarly
performed using the A/D module’s internal capacitor
(C
performed using the A/D module’s internal capacitor
(C
AD
) and a precision resistor for current calibration.
Figure 26-2 shows the external connections used for
time measurements, and how the CTMU and A/D
modules are related in this application. This example
also shows both edge events coming from the external
CTEDG pins, but other configurations using internal
edge sources are possible. A detailed discussion on
measuring capacitance and time with the CTMU module
is provided in the “PIC24F Family Reference Manual”.
time measurements, and how the CTMU and A/D
modules are related in this application. This example
also shows both edge events coming from the external
CTEDG pins, but other configurations using internal
edge sources are possible. A detailed discussion on
measuring capacitance and time with the CTMU module
is provided in the “PIC24F Family Reference Manual”.
26.3
Pulse Generation and Delay
The CTMU module can also generate an output pulse
with edges that are not synchronous with the device’s
system clock. More specifically, it can generate a pulse
with a programmable delay from an edge event input to
the module.
with edges that are not synchronous with the device’s
system clock. More specifically, it can generate a pulse
with a programmable delay from an edge event input to
the module.
When the module is configured for pulse generation
delay by setting the TGEN (CTMUCON<12>) bit, the
internal current source is connected to the B input of
Comparator 2. A capacitor (C
delay by setting the TGEN (CTMUCON<12>) bit, the
internal current source is connected to the B input of
Comparator 2. A capacitor (C
DELAY
) is connected to
the Comparator 2 pin, C2INB, and the comparator volt-
age reference, CV
age reference, CV
REF
, is connected to C2INA. CV
REF
is then configured for a specific trip point. The module
begins to charge C
begins to charge C
DELAY
when an edge event is
detected. When C
DELAY
charges above the CV
REF
trip
point, a pulse is output on CTPLS. The length of the
pulse delay is determined by the value of C
pulse delay is determined by the value of C
DELAY
and
the CV
REF
trip point.
Figure 26-3 shows the external connections for pulse
generation, as well as the relationship of the different
analog modules required. While CTEDG1 is shown as
the input pulse source, other options are available. A
detailed discussion on pulse generation with the CTMU
module is provided in the “PIC24F Family Reference
Manual”.
generation, as well as the relationship of the different
analog modules required. While CTEDG1 is shown as
the input pulse source, other options are available. A
detailed discussion on pulse generation with the CTMU
module is provided in the “PIC24F Family Reference
Manual”.
FIGURE 26-2:
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME
MEASUREMENT TIME
MEASUREMENT TIME
FIGURE 26-3:
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE
DELAY GENERATION
DELAY GENERATION
PIC24F Device
A/D Converter
CTMU
CTEDG1
CTEDG2
ANx
Output Pulse
EDG1
EDG2
C
AD
R
PR
Current Source
C2
CV
REF
CTPLS
PIC24F Device
Current Source
Comparator
CTMU
CTEDG1
C2INB
C
DELAY
EDG1