Microchip Technology MCP1630DM-DDBS1 Data Sheet
PIC12F683
DS41211D-page 16
©
2007 Microchip Technology Inc.
2.2.2.6
PCON Register
The Power Control (PCON) register contains flag bits
(see Table 12-2) to differentiate between a:
(see Table 12-2) to differentiate between a:
• Power-on Reset (POR)
• Brown-out Reset (BOR)
• Watchdog Timer Reset (WDT)
• External MCLR Reset
The PCON register also controls the Ultra Low-Power
Wake-up and software enable of the BOR.
Wake-up and software enable of the BOR.
The PCON register bits are shown in Register 2-6.
REGISTER 2-6:
PCON: POWER CONTROL REGISTER
U-0
U-0
R/W-0
R/W-1
U-0
U-0
R/W-0
R/W-x
—
—
ULPWUE
SBOREN
—
—
POR
BOR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘
0
’
bit 5
ULPWUE: Ultra Low-Power Wake-Up Enable bit
1
= Ultra Low-Power Wake-up enabled
0
= Ultra Low-Power Wake-up disabled
bit 4
SBOREN: Software BOR Enable bit
(1)
1
= BOR enabled
0
= BOR disabled
bit 3-2
Unimplemented: Read as ‘
0
’
bit 1
POR: Power-on Reset Status bit
1
= No Power-on Reset occurred
0
= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOR: Brown-out Reset Status bit
1
= No Brown-out Reset occurred
0
= A Brown-out Reset occurred (must be set in software after a Power-on Reset or Brown-out Reset
occurs)
Note 1:
Set BOREN<1:0> =
01
in the Configuration Word register for this bit to control the BOR.