Microchip Technology DM240015 Data Sheet

Page of 472
PIC24FJ128GC010 FAMILY
DS30009312B-page 274
 
 2012-2013 Microchip Technology Inc.
19.3
USB Interrupts
The USB OTG module has many conditions that can
be configured to cause an interrupt. All interrupt
sources use the same interrupt vector.
 shows the interrupt logic for the USB
module. There are two layers of interrupt registers in
the USB module. The top level consists of overall USB
status interrupts; these are enabled and flagged in the
U1IE and U1IR registers, respectively. The second
level consists of USB error conditions, which are
enabled and flagged in the U1EIR and U1EIE registers.
An interrupt condition in any of these triggers a USB
Error Interrupt Flag (UERRIF) in the top level. Unlike
the device-level interrupt flags in the IFSx registers,
USB interrupt flags in the U1IR registers can only be
cleared by writing a ‘1’ to the bit position.
Interrupts may be used to trap routine events in a USB
transaction. 
 provides some common
events within a USB frame and their corresponding
interrupts.
FIGURE 19-8:
USB OTG INTERRUPT FUNNEL 
DMAEF
DMAEE
BTOEF
BTOEE
DFN8EF
DFN8EE
CRC16EF
CRC16EE
CRC5EF (EOFEF)
CRC5EE (EOFEE)
PIDEF
PIDEE
ATTACHIF
ATTACHIE
RESUMEIF
RESUMEIE
IDLEIF
IDLEIE
TRNIF
TRNIE
SOFIF
SOFIE
URSTIF (DETACHIF)
URSTIE (DETACHIE)
(UERRIF)
UERRIE
Set USB1IF
STALLIF
STALLIE
BTSEF
BTSEE
T1MSECIF
TIMSECIE
LSTATEIF
LSTATEIE
ACTVIF
ACTVIE
SESVDIF
SESVDIE
SESENDIF
SESENDIE
VBUSVDIF
VBUSVDIE
IDIF
IDIE
Second Level (USB Error) Interrupts
Top Level (USB Status) Interrupts
Top Level (USB OTG) Interrupts