Microchip Technology MA330020 Data Sheet

Page of 398
 2008-2014 Microchip Technology Inc.
DS70000318G-page 267
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
21.0
SPECIAL FEATURES
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
devices include several features intended to maximize
application flexibility and reliability, and minimize cost
through elimination of external components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection and CodeGuard™ Security
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit Emulation
• Brown-out Reset (BOR)
21.1
Configuration Bits
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
devices provide nonvolatile memory implementations
for device Configuration bits. Refer to “Device Config-
uration”
 (DS70194) in the “dsPIC33F/PIC24H Family
Reference Manual”
 for more information on this
implementation.
The Configuration bits can be programmed (read
as ‘0’), or left unprogrammed (read as ‘1’), to select
various device configurations. These bits are mapped
starting at program memory location 0xF80000. 
The individual Configuration bit descriptions for the
Configuration registers are shown in 
Note that address, 0xF80000, is beyond the user pro-
gram memory space. It belongs to the configuration
memory space (0x800000-0xFFFFFF), which can only
be accessed using Table Reads and Table Writes.
The device Configuration register map is shown in
 
Note 1: This data sheet summarizes the features
of the dsPIC33FJ06GS101/X02 and
dsPIC33FJ16GSX02/X04 devices. It is
not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
“dsPIC33F/PIC24H Family Reference
Manual”
. Please see the Microchip web
site (
www.microchip.com
) for the latest
“dsPIC33F/PIC24H Family Reference
Manual”
 sections.
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
 in
this data sheet for device-specific register
and bit information.
TABLE 21-1:
DEVICE CONFIGURATION REGISTER MAP
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0xF80000 FBS
BSS2
BSS1
BSS0
BWRP
0xF80002 Reserved
0xF80004 FGS
GSS1
GSS0
GWRP
0xF80006 FOSCSEL
IESO
FNOSC2
FNOSC1
FNOSC0
0xF80008 FOSC
FCKSM1 FCKSM0 IOL1WAY
OSCIOFNC
POSCMD1
POSCMD0
0xF8000A FWDT
FWDTEN WINDIS
WDTPRE WDTPOST3 WDTPOST2 WDTPOST1
WDTPOST0
0xF8000C FPOR
Reserved
FPWRT2
FPWRT1
FPWRT0
0xF8000E FICD
Reserved
JTAGEN
ICS1
ICS0
0xF80010 FUID0
User Unit ID Byte 0
0xF80012 FUID1
User Unit ID Byte 1
Legend:
— = unimplemented bit, read as ‘0’.
Note 1:
These bits are reserved for use by development tools and must be programmed to ‘1’.
2:
This bit reads the current programmed value.