Microchip Technology MA330020 Data Sheet
2008-2014 Microchip Technology Inc.
DS70000318G-page 269
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
POSCMD<1:0>
FOSC
Immediate
Primary Oscillator Mode Select bits
11
= Primary Oscillator is disabled
10
= HS Crystal Oscillator mode
01
= XT Crystal Oscillator mode
00
= EC (External Clock) mode
FWDTEN
FWDT
Immediate
Watchdog Timer Enable bit
1
= Watchdog Timer is always enabled (LPRC oscillator cannot be
disabled; clearing the SWDTEN bit in the RCON register will have
no effect)
no effect)
0
= Watchdog Timer is enabled/disabled by user software (LPRC can
be disabled by clearing the SWDTEN bit in the RCON register)
WINDIS
FWDT
Immediate
Watchdog Timer Window Enable bit
1
= Watchdog Timer in Non-Window mode
0
= Watchdog Timer in Window mode
WDTPRE
FWDT
Immediate
Watchdog Timer Prescaler bit
1
= 1:128
0
= 1:32
WDTPOST<3:0>
FWDT
Immediate
Watchdog Timer Postscaler bits
1111
= 1:32,768
1110
= 1:16,384
•
•
•
0001
= 1:2
0000
= 1:1
FPWRT<2:0>
FPOR
Immediate
Power-on Reset Timer Value Select bits
111
= PWRT = 128 ms
110
= PWRT = 64 ms
101
= PWRT = 32 ms
100
= PWRT = 16 ms
011
= PWRT = 8 ms
010
= PWRT = 4 ms
001
= PWRT = 2 ms
000
= PWRT = Disabled
JTAGEN
FICD
Immediate
JTAG Enable bit
1
= JTAG is enabled
0
= JTAG is disabled
ICS<1:0>
FICD
Immediate
ICD Communication Channel Select Enable bits
11
= Communicates on PGEC1 and PGED1
10
= Communicates on PGEC2 and PGED2
01
= Communicates on PGEC3 and PGED3
00
= Reserved, do not use.
TABLE 21-2:
dsPIC33F CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field
Register
RTSP Effect
Description