Microchip Technology DM183021 Data Sheet
PIC18F2331/2431/4331/4431
DS39616D-page 242
2010 Microchip Technology Inc.
REGISTER 21-3:
ADCON2: A/D CONTROL REGISTER 2
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
ADFM
ACQT3
ACQT2
ACQT1
ACQT0
ADCS2
ADCS1
ADCS0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
ADFM:
A/D Result Format Select bit
1
= Right justified
0
= Left justified
bit 6-3
ACQT<3:0>
: A/D Acquisition Time Select bits
0000
= No delay (conversion starts immediately when GO/DONE is set)
(1)
0001
= 2 T
AD
0010
= 4 T
AD
0011
= 6 T
AD
0100
= 8 T
AD
0101
= 10 T
AD
0110
= 12 T
AD
0111
= 16 T
AD
1000
= 20 T
AD
1001
= 24 T
AD
1010
= 28 T
AD
1011
= 32 T
AD
1100
= 36 T
AD
1101
= 40 T
AD
1110
= 48 T
AD
1111
= 64 T
AD
bit 2-0
ADCS<2:0>:
A/D Conversion Clock Select bits
000
= F
OSC
/2
001
= F
OSC
/8
010
= F
OSC
/32
011
= F
RC
/4
100
= F
OSC
/4
101
= F
OSC
/16
110
= F
OSC
/64
111
= F
RC
(Internal A/D RC Oscillator)
Note 1:
If the A/D RC clock source is selected, a delay of one T
CY
(instruction cycle) is added before the A/D clock
starts. This allows the SLEEP instruction to be executed before starting a conversion.