Microchip Technology ARD00385 Data Sheet
PIC18F87K90 FAMILY
DS39957D-page 124
2009-2011 Microchip Technology Inc.
8.6
Operation During Code-Protect
Data EEPROM memory has its own code-protect bits in
the Configuration Words. External read and write
operations are disabled if code protection is enabled.
The microcontroller itself can both read and write to the
internal data EEPROM, regardless of the state of the
code-protect Configuration bit. Refer to
the Configuration Words. External read and write
operations are disabled if code protection is enabled.
The microcontroller itself can both read and write to the
internal data EEPROM, regardless of the state of the
code-protect Configuration bit. Refer to
for additional
information.
8.7
Protection Against Spurious Write
There are conditions when the device may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been implemented. On power-up, the WREN bit is
cleared. In addition, writes to the EEPROM are
blocked during the Power-up Timer period (T
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been implemented. On power-up, the WREN bit is
cleared. In addition, writes to the EEPROM are
blocked during the Power-up Timer period (T
PWRT
,
Parameter
in
).
The write initiate sequence, and the WREN bit
together, help prevent an accidental write during
brown-out, power glitch or software malfunction. The
WREN bit is not cleared by hardware.
together, help prevent an accidental write during
brown-out, power glitch or software malfunction. The
WREN bit is not cleared by hardware.
8.8
Using the Data EEPROM
The data EEPROM is a high-endurance, byte address-
able array that has been optimized for the storage of
frequently changing information (e.g., program
variables or other data that are updated often).
Frequently changing values will typically be updated
more often than Specification
able array that has been optimized for the storage of
frequently changing information (e.g., program
variables or other data that are updated often).
Frequently changing values will typically be updated
more often than Specification
. If this is the case,
an array refresh must be performed. For this reason,
variables that change infrequently (such as constants,
IDs, calibration, etc.) should be stored in Flash program
memory.
A simple data EEPROM refresh routine is shown in
variables that change infrequently (such as constants,
IDs, calibration, etc.) should be stored in Flash program
memory.
A simple data EEPROM refresh routine is shown in
.
EXAMPLE 8-3:
DATA EEPROM REFRESH ROUTINE
Note:
If data EEPROM is only used to store
constants and/or data that changes often,
an array refresh is likely not required. See
Specification
constants and/or data that changes often,
an array refresh is likely not required. See
Specification
in
CLRF
EEADR
; Start at address 0
CLRF
EEADRH
;
BCF
EECON1, CFGS
; Set for memory
BCF
EECON1, EEPGD
; Set for Data EEPROM
BCF
INTCON, GIE
; Disable interrupts
BSF
EECON1, WREN
; Enable writes
LOOP
; Loop to refresh array
BSF
EECON1, RD
; Read current address
MOVLW
0x55
;
MOVWF
EECON2
; Write 55h
MOVLW
0xAA
;
MOVWF
EECON2
; Write 0AAh
BSF
EECON1, WR
; Set WR bit to begin write
BTFSC
EECON1, WR
; Wait for write to complete
BRA
$-2
INCFSZ
EEADR, F
; Increment address
BRA
LOOP
; Not zero, do it again
INCFSZ
EEADRH, F
; Increment the high address
BRA
LOOP
; Not zero, do it again
BCF
EECON1, WREN
; Disable writes
BSF
INTCON, GIE
; Enable interrupts