Microchip Technology ARD00385 Data Sheet
PIC18F87K90 FAMILY
DS39957D-page 282
2009-2011 Microchip Technology Inc.
20.3.2
INTERNAL RESISTOR BIASING
This mode does not use external resistors, but rather
internal resistor ladders that are configured to generate
the bias voltage.
The internal reference ladder actually consists of three
separate ladders. Disabling the internal reference
ladder disconnects all of the ladders, allowing external
voltages to be supplied.
Depending on the total resistance of the resistor
ladders, the biasing can be classified as low, medium
or high power.
internal resistor ladders that are configured to generate
the bias voltage.
The internal reference ladder actually consists of three
separate ladders. Disabling the internal reference
ladder disconnects all of the ladders, allowing external
voltages to be supplied.
Depending on the total resistance of the resistor
ladders, the biasing can be classified as low, medium
or high power.
shows the total resistance of each of the
ladders.
connections. When the internal resistor ladder is
selected, the bias voltage can either be from V
selected, the bias voltage can either be from V
DD
or
from V
DDCORE
, depending on the LCDIRS setting.
FIGURE 20-4:
LCD BIAS INTERNAL RESISTOR LADDER CONNECTION DIAGRAM
TABLE 20-3:
INTERNAL RESISTANCE
LADDER POWER MODES
LADDER POWER MODES
Power Mode
Nominal
Resistance of
Entire Ladder
Entire Ladder
I
DD
Low
3 M
1
A
Medium 300
k
10
A
High
30 k
100
A
LCDBIAS3
LCDBIAS2
LCDBIAS1
VLCD3PE
VLCD2PE
VLCD1PE
LCDCST<2:0>
LCDIRE
LCDIRS
V
DD
3x Band Gap
LRLAT<2:0>
A Power Mode
B Power Mode
LRLAP<1:0>
LRLBP<1:0>
Low
Resistor
Ladder
Medium
Resistor
Ladder
High
Resistor
Ladder
V
DD
V
DDCORE