Microchip Technology ARD00385 Data Sheet
2009-2011 Microchip Technology Inc.
DS39957D-page 283
PIC18F87K90 FAMILY
There are two power modes designated as “Mode A”
and “Mode B”. Mode A is set by the bits, LRLAP<1:0>
and Mode B by LRLB<1:0>. The resistor ladder to use
for Modes A and B are selected by the bits,
LRLAP<1:0> and LRLBP<1:0>, respectively
Each ladder has a matching contrast control ladder,
tuned to the nominal resistance of the reference ladder.
This contrast control resistor can be controlled by
LCDREF<5:3> (LCDCST<2:0>). Disabling the internal
reference ladder results in all of the ladders being
disconnected, allowing external voltages to be
supplied.
To get additional current in High-Power mode, when
LCDRL<7:6> (LRLAP<1:0>) = 11, both the medium
and high-power resistor ladders are activated.
Whenever the LCD module is inactive (LCDA
(LCDPS<5>) = 0), the reference ladder will be turned
off.
and “Mode B”. Mode A is set by the bits, LRLAP<1:0>
and Mode B by LRLB<1:0>. The resistor ladder to use
for Modes A and B are selected by the bits,
LRLAP<1:0> and LRLBP<1:0>, respectively
Each ladder has a matching contrast control ladder,
tuned to the nominal resistance of the reference ladder.
This contrast control resistor can be controlled by
LCDREF<5:3> (LCDCST<2:0>). Disabling the internal
reference ladder results in all of the ladders being
disconnected, allowing external voltages to be
supplied.
To get additional current in High-Power mode, when
LCDRL<7:6> (LRLAP<1:0>) = 11, both the medium
and high-power resistor ladders are activated.
Whenever the LCD module is inactive (LCDA
(LCDPS<5>) = 0), the reference ladder will be turned
off.
20.3.2.1
Automatic Power Mode Switching
As an LCD segment is electrically only a capacitor, cur-
rent is drawn only during the interval when the voltage
is switching. To minimize total device current, the LCD
reference ladder can be operated in a different power
mode for the transition portion of the duration. This is
controlled by the LCDRL register.
Mode A Power mode is active for a programmable time,
beginning at the time when the LCD segment waveform
is transitioning. The LCDRL<2:1> (LRLAT<2:0>) bits
select how long, or if the Mode A is active. Mode B
Power mode is active for the remaining time before the
segments or commons change again.
As shown in
rent is drawn only during the interval when the voltage
is switching. To minimize total device current, the LCD
reference ladder can be operated in a different power
mode for the transition portion of the duration. This is
controlled by the LCDRL register.
Mode A Power mode is active for a programmable time,
beginning at the time when the LCD segment waveform
is transitioning. The LCDRL<2:1> (LRLAT<2:0>) bits
select how long, or if the Mode A is active. Mode B
Power mode is active for the remaining time before the
segments or commons change again.
As shown in
, there are 32 counts in a single
segment time. Type-A can be chosen during the time
when the wave form is in transition. Type-B can be
used when the clock is stable or not in transition.
By using this feature of automatic power switching,
using Type-A/Type-B, the power consumption can be
optimized for a given contrast.
when the wave form is in transition. Type-B can be
used when the clock is stable or not in transition.
By using this feature of automatic power switching,
using Type-A/Type-B, the power consumption can be
optimized for a given contrast.
FIGURE 20-5:
LCD REFERENCE LADDER POWER MODE SWITCHING DIAGRAM
Single Segment Time
'H00
'H01
'H02
'H03
'H04
'H05
'H06
'H07
'H1E
'H1F
'H00
'H01
'H3
Power Mode A
Power Mode B
Mode A
LRLAT<2:0>
lcd_32x_clk
cnt<4:0>
lcd_clk
LRLAT<2:0>
Segment Data
Power Mode